SST30VR041 查看數據表（PDF） - Silicon Storage Technology
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SST30VR041 Datasheet PDF : 10 Pages
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PACKAGING DIAGRAMS
4 Mbit ROM + 1 Mbit / 256 Kbit SRAM ROM/RAM Combo
SST30VR041 / SST30VR043
Preliminary Specifications
Pin # 1 Identifier
1.05
0.95
8.10
7.90
.50
BSC
.270
.170
12.50
12.30
0.15
0.05
0.70
0.50
14.20
13.80
32.TSOP-WH-ILL.4
Note:
1. Complies with JEDEC publication 95 MO-142 BA dimensions, although some dimensions may be more stringent.
2. All linear dimensions are in millimeters (min/max).
3. Coplanarity: 0.1 (±.05) mm.
4. Maximum allowable mold flash is 0.15mm at the package ends, and 0.25mm between leads.
32-PIN THIN SMALL OUTLINE PACKAGE (TSOP) 8MM X 14MM
SST PACKAGE CODE: WH
Silicon Storage Technology, Inc. • 1171 Sonora Court • Sunnyvale, CA 94086 • Telephone 408-735-9110 • Fax 408-735-9036
www.SuperFlash.com or www.ssti.com
©2001 Silicon Storage Technology, Inc.
10
S71134-02-000 4/01 381
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