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SST30VR041-70-C-WN 查看數據表(PDF) - Silicon Storage Technology

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产品描述 (功能)
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SST30VR041-70-C-WN
SST
Silicon Storage Technology SST
SST30VR041-70-C-WN Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
4 Mbit ROM + 1 Mbit / 256 Kbit SRAM ROM/RAM Combo
SST30VR041 / SST30VR043
Preliminary Specifications
AC CHARACTERISTICS
I. ROM Operation
TABLE 5: READ CYCLE TIMING PARAMETERS
Symbol
TRC
TAA
TCO
TOE
TLZ
TOLZ
THZ
TOHZ
TOH
Parameter
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Valid Output
Chip Select to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
VDD = 3.0V±0.3
SST30VR041-70
Min
Max
70
70
70
35
0
0
25
25
10
SST30VR041/043-150
Min
Max
150
150
150
70
0
0
30
30
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
T5.2 381
Address
Data Out
TRC
TAA
TOH
Previous Data Valid
Data Valid
381 ILL F02.0
FIGURE 4: ROM READ CYCLE TIMING DIAGRAM (ADDRESS CONTROLLED) (ROMCS# = OE# = VIL)
©2001 Silicon Storage Technology, Inc.
5
S71134-02-000 4/01 381

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