SFSD1024N1BW1MT-E-ME-111-STD 查看數據表（PDF） - Unspecified
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SFSD1024N1BW1MT-E-ME-111-STD Datasheet PDF : 23 Pages
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Figure 6: AC Characteristics Low Speed Mode
Table 16: AC Characteristics High Speed Mode
Parameter
Symbol Min Max Unit
Notes
Clock frequency in data transfer mode fPP
0
50
MHz
Clock low time
tWL 7.0
ns
Clock high time
tWH 7.0
ns
Clock rise time
tTLH
3
ns
Clock fall time
CMD, DAT input setup time
tTHL
3
ns
tISU 6
ns
CL≤10pF
CMD, DAT input hold time
tIH
2
ns
CMD, DAT output delay time during data
transfer mode
tODLY
14
ns
CMD, DAT output hold time
tOH 2.5
ns
Notes
1. Rise and fall times are measured from 10% to 90% of voltage level.
2. CLK referenced to VIH min and VIL max.
3. CMD and DAT inputs and outputs referenced to CLK.
4. In order to satisfy severe timing, the host shall drive only one card with max 40pF total at each line.
Figure 7: AC Characteristics High Speed Mode
Swissbit AG
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CH-9552 Bronschhofen
Switzerland
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.10
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S-300u_data_sheet_SD-NxBW_Rev110
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