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UPC2745TB 查看數據表(PDF) - NEC => Renesas Technology

零件编号
产品描述 (功能)
生产厂家
UPC2745TB
NEC
NEC => Renesas Technology NEC
UPC2745TB Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
UPC2745TB, UPC2746TB
ELECTRICAL CHARACTERISTICS (TA = +25 °C, ZL = ZS = 50 )
SYMBOLS
RLIN
RLOUT
ISOL
IM3
PART NUMBER
PACKAGE OUTLINE
PARAMETERS AND CONDITIONS
Input Return Loss, VCC = 3.0 V, f = 0.5 GHz
VCC = 3.0 V, f = 1 GHz
VCC = 3.0 V, f = 2 GHz
VCC = 1.8 V, f = 0.5 GHz
Output Return Loss, VCC = 3.0 V, f = 0.5 GHz
VCC = 3.0 V, f = 1 GHz
VCC = 3.0 V, f = 2 GHz
VCC = 1.8 V, f = 0.5 GHz
Isolation, VCC = 3.0 V, f = 0.5 GHz
VCC = 3.0 V, f = 1 GHz
VCC = 3.0 V, f = 2 GHz
VCC = 1.8 V, f = 0.5 GHz
3rd Order Intermodulation Distortion
VCC = 3.0 V, POUT = -20 dBm, f1 = 500 MHz, f2 = 502 MHz
VCC = 3.0 V, POUT = -20 dBm, f1 = 1000 MHz, f2 = 1002 MHz
VCC = 1.8 V, POUT = -20 dBm, f1 = 500 MHz, f2 = 502 MHz
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBc
dBc
dBc
UPC2745TB
S06
MIN
TYP MAX
8
11
13
14
6.5
2.5
5.5
6.5
8.5
6.0
33
38
33
30
35
UPC2746TB
S06
MIN TYP MAX
10
13
10
10
5.5 8.5
8.5
9.5
40
45
38
37
-54
-51
-50
-31
-37
ABSOLUTE MAXIMUM RATINGS1 (TA = 25°C)
SYMBOLS
PARAMETERS
UNITS RATINGS
VCC Supply Voltage (Pin 5, Pin 8) V
4.0
PIN
Input Power
dBm
0
PT
Total Power Dissipation2
mW
200
TOP Operating Temperature
°C
-45 to +85
TSTG Storage Temperature
°C -55 to +150
Notes:
1. Operation in excess of any one of these parameters may result
in permanent damage.
2. Mounted on double sided copper clad 50 x 50 x 1.6 mm epoxy
glass PWB (TA = +85°C).
RECOMMENDED
OPERATING CONDITIONS
SYMBOL
PARAMETER
UNITS MIN TYP MAX
VCC
Supply Voltage
V 2.7 3.0 3.3
TOP Operating Temperature ˚C -40 +25 +85
PIN DESCRIPTION
Pin
Pin
Applied
No.
Name
Voltage
(V)
1
Input
Description
Signal input pin. An internal matching
circuit, configured with resistors, enables
50 connection over a wide bandwidth.
This pin must be coupled to the signal source
with a blocking capacitor.
Internal Equivalent Circuit
6
4
4
Output
Signal output pin. An internal matching
circuit, configured with resistors, enables
50 connection over a wide bandwidth.
This pin must be coupled to the output
1
load with a blocking capacitor.
6
VCC
2.7 to 3.3
Power supply pin. This pin should be
externally equipped with a bypass capacitor
to minimize ground impedance.
2
2
GND
0
Ground pin. This pin should be connected
3
3
to system ground with minimum inductance.
5
5
Ground pattern on the board should be
formed as wide as possible. All the ground
pins must be connected together with wide
ground pattern to minimize impedance
difference.

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