DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

TMC2249A 查看數據表(PDF) - Raytheon Company

零件编号
产品描述 (功能)
生产厂家
TMC2249A
Raytheon
Raytheon Company Raytheon
TMC2249A Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
TMC2249A
PRODUCT SPECIFICATION
Application Notes
The TMC2249A is a flexible signal and image processing
building block with numerous user-selectable functions
which expand its usefulness. Table 2 clarifies the operation of
the device, demonstrating the various feature available to the
user and the timing delays incurred.
Table 2. TMC2249A Operation Sequence
CLK ADEL A11-0 BDEL B11-0 CDEL C11-0 DDEL D11-0 NEG1 NEG2 CAS15-0 FT ACC RND SWAP
1 0 A(1) 0 B(1) 0 C(1) 0 D(1) L L
0 LL H H
S15-0
2 0 A(2) 0 B(2) 0 C(2) 0 D(2) L H
0 LL H H
3 0 A(3) 0 B(3) 0 C(3) 0 D(3) H L
0 LL L H
4 0 A(4) 0 B(4) 0 C(4) 0 D(4) L L CAS(4) L L L H
5 0 A(5) 0 B(5) 0 C(5) 0 D(5) L
6 0 A(6) 0 B(6) 0 C(6) 0 D(6) L
7 0 A(7) 0 B(7) 0 C(7) 0 D(7) L
8 0 A(8) 0 B(8) 0 C(8) 0 D(8) L
9 0 A(9) 0 B(9) 0 C(9) 0 D(9) L
10
11
12
L
0 LL L
L
0 LL H
L
0 LH X
L CAS(8) H L L
L
0 LL H
H
H (A(1) × B(1)+C(1) × D(1)+27)ms
H (A(2) × B(2)-C(2) × D(2)+27)ms
L (-A(3) × B(3)+C(3) × D(3))ms
H (A(4) × B(4)+C(4) × D(4)+CAS(4))ms
(A(5) × B(5)+C(5) × D(5)+CAS(8))ms
(A(6) × B(6)+C(6) × D(6)+27)ms
(A(7) × B(7)+C(7) × D(7)+S(11))ms
13
(S(12))ls
14
(A(9) × B(8)+C(7) × D(6)+27)ms
CASEN = 0, H=HIGH, L=LOW, “ms” indicates most significant output word (bits 23-8), “ls” indicates least significant word (bits
15-0). The appropriate enables for the indicated data are assumed, otherwise ‘-’ indicates that port not enabled. Note that the
output data summations including A(8)-D(8) is lost, since the output on cycle 13 is swapped to the LSW of S(12) on cycle 8. In
general, RND may be left high unless the ls output is to be used, as on line 8 above.
Digital Filtering
The input structure of the TMC2249A demonstrates great
versatility when all four multiplier inputs and the program-
mable delay registers are utilized.
Table 3 and Table 4 illlustrate how a direct-form symmetric
FIR filter of up to 32 taps can be implemented. By utilizing
the four input delay registers as pipelined storage banks, the
user can store up to 32 coefficient-data word pairs, split into
alternate "even" and "odd" halves. Two taps of the filter are
calculated on each clock, and the user then increments/decre-
ments the delay words (ADEL-DDEL). The sums of prod-
ucts are successively added to the global sum in the internal
accumulator.
Table 3. FIR Filtering with the TMC2249A — Initial Data Loading
Register Position (Hex)
Even Data
A
Odd Data
C
0
x(31)
x(30)
1
x(29)
x(28)
2
x(27)
x(26)
3
x(25)
x(24)
4
x(23)
x(22)
5
x(21)
x(20)
6
x(19)
x(18)
7
x(17)
x(16)
8
x(15)
x(14)
9
x(13)
x(12)
A
x(11)
x(10)
B
x(9)
x(8)
C
x(7)
x(6)
D
x(5)
x(4)
E
x(3)
x(2)
F
x(1)
x(0)
Coefficient
B
h(0)
h(2)
h(4)
h(6)
h(8)
h(10)
h(12)
h(14)
h(15)
h(13)
h(11)
h(9)
h(7)
h(5)
h(3)
h(1)
Storage
D
h(1)
h(3)
h(5)
h(7)
h(9)
h(11)
h(13)
h(15)
h(14)
h(12)
h(10)
h(8)
h(6)
h(4)
h(2)
h(0)
10

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]