HCF4029B 查看數據表（PDF） - STMicroelectronics

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HCF4029B

PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE

STMicroelectronics 

HCF4029B

Symbol

Parameter

VDD (V)

Test Condition

Value (*)

Unit

Min. Typ. Max.

PRESET ENABLE

tPHL tPLH Propagation Delay Time

5

(Carry Output)

10

170 340

70 140 ns

15

50 100

tsetup(3)

Minimum Setup Time

(Carry In)

5

10

25 50

15 30 ns

15

12 25

thold Minimum Hold Time

5

(Carry In)

10

100 200

35 70 ns

15

30 60

(*) Typical temperature coefficient for all VDD value is 0.3 %/°C.

(1) If more than one unit is cascated in the parallel clocked application tr should be made less than or equal to the sum of the fixed propagation

delay at 15pF and the transition time of the carry output driving stage for the estimated capacitance load.

(2) From Up/Down, Binary/Decade, Carry In or Preset Enable Control Inputs to Clock Edge.

(3) From Carry In to Clock Edge.

TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)

RL = 200KΩ

RT = ZOUT of pulse generator (typically 50Ω)

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