SL4052BD 查看數據表（PDF） - System Logic Semiconductor

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SL4052BD

Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL4052B

ADDITIONAL APPLICATION CHARACTERISTICS

Symbol

BW

THD

Parameter

Maximum On-

Channel

Bandwidth or

Minimum

Frequency

Response (-3db)

(-40db)

Feedthrough

Frequency (All

Channels OFF)

(-40db)

Signal Crosstalk

Frequency

Total Harmonic

Distortion

Test Conditions

VEE=GND

RL=1kΩ

20 log(VOS/VIS)=-3db

VOS at Common OUT/IN

VOS at Any Channel

VEE=GND

RL=1kΩ

20 log(VOS/VIS)=-40db

VOS at Common OUT/IN

VOS at Any Channel

VEE=GND

RL=1kΩ

20 log(VOS/VIS)=-40db

Between Sections :

Measured on Common

Measured on Any Chanel

VEE=GND

fIS=1kHz sine wave

-

Address-or

VEE=GND

Enable to Signal RL=10kΩ**

Crosstalk

tr,tf=20ns

Square Wave

* Peak-to-peak voltage symmetrical about (VDD-VEE)/2

** Both ends of channel

VCC

VIS Limit*

V

V 25 °C Unit

10

5*

25 MHz

10

5*

60

10

5*

10

10

5*

8

6

10

5

2*

0.3 %

10

3*

0.2

15

5*

012

10

-

65 mv

(peak)

SLS

System Logic

Semiconductor

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