ADC-30634 查看數據表（PDF） - DATEL Data Acquisition products

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ADC-30634

8-Bit, 20MSPS CMOS Flash A/D (ADC-208 Compatible)

DATEL Data Acquisition products  

ADC-30634/ADC-30720

®

®

ABSOLUTE MAXIMUM RATINGS

PARAMETERS

LIMITS

Power Supply Voltage (VDD Pin 1, 10, 19)

Digital Inputs

Analog Input

Reference Inputs

Digital Outputs

(short circuit protected to ground)

Lead Temperature (10 sec. max.)

Storage Temperature

–0.5 to +7

–0.5 to +5.5

–0.5 to (+VDD +0.5)

–0.5 to (+VDD +0.5)

–0.5 to +5.5

+300 max.

–65 to +150

UNITS

Volts

Volts

Volts

Volts

Volts

°C

°C

FUNCTIONAL SPECIFICATIONS

(Typical at +5V power, +25°C, 20MHz clock, +REFERENCE = +5V,

–REFERENCE = ground, unless noted)

ANALOG INPUT

Single-Ended, Non-Isolated

Input Range DC - 20MHz

Analog Input Capacitance

(static - Pin 5 to 7)

(dynamic - Pin 5 to 7)

Reference Ladder Resistance

Reference Input (Note 5)

DIGITAL INPUTS

Logic Levels

Logic "1"

Logic "0"

Logic Loading

Logic Loading "1"

Logic Loading "0"

Clock Low Pulse Width

DIGITAL OUTPUTS

Logic Levels

Logic "1"

Logic "0"

Logic Loading

Logic Loading "1"

Logic Loading "0"

Output Data Valid Delay From

Rising Clock Edge

99% probability

100% probability

+25°C

–55°C to +125°C

Data Output Resolution

Data Coding

PERFORMANCE

Sampling Rate ➁

Full Power Bandwidth

Diff. Linearity @ +25°C

(See tech note 7)

Code Transitions

Center of Codes

Diff. Linearity Over Temp.

Code Transitions

Center of Codes

Int. Linearity @ +25°C

(See tech note 4)(ref. adjusted)

End-point

Best-fit Line

Int. Linearity Over Temp.

(ref. adjusted)

Best-fit Line

Int. Linearity @ +25°C

(ref. unadjusted)

End-point

Best-fit Line

MIN. TYP. MAX. UNITS

0

–

+5.0 Volts

–

20

–

pF

–

64

–

pF

–

500

– Ohms

–0.5

– VDD +0.5 Volts

3.2

—

— Volts

—

—

0.8 Volts

—

+1

+5

mA

—

+1

+5

mA

15

25

— nSec

2.4

4.5

5.0 Volts

—

—

0.4 Volts

4

—

—

mA

4

—

—

mA

5

10

15 nSec

5

10

25 nSec

—

—

40 nSec

8

—

—

Bits

Straight binary

15

20

— MSPS

10

—

—

MHz

—

±0.5 ±1.0 LSB

—

±0.25

—

LSB

—

±0.5 ±1.0 LSB

—

±0.25

—

LSB

—

—

±1/2 LSB

—

—

±1/2 LSB

—

±1/2

±1

LSB

—

±2

±2.5 LSB

—

±1.6 ±1.9 LSB

PERFORMANCE

MIN. TYP. MAX. UNITS

Int. Linearity Over Temp.

(ref. unadjusted)

End-point

Best-fit Line

Zero-Scale Offset

(Code "0" to "1" transition)

Gain error, @ +25°C

Over Temperature

Differential Gain ➂

Differential Phase ➂

Aperture Delay

Aperture Jitter

Harmonic Distortion

(8MHz second order harm.)

Ref. bandwidth

(See tech note 5)

Power Supply Rejection

No Missing Codes

—

±2.3 ±2.6 LSB

—

±1.8 ±2.0 LSB

—

±2.5

±4

LSB

—

±1 ±1.75 LSB

—

±1.5 ±2.5 LSB

—

2

—

%

—

1.1

— degrees

—

8

—

ns

—

50

—

ps

–40

–46

—

dB

—

10

—

MHz

— ±0.02 ±0.05 %FSR/%Vs

Over the operating temperature range

POWER REQUIREMENTS

Power Supply Range (+VDD)

Power Supply Current

+25°C

+125°C

–55°C

Power Dissipation

+25°C

+125°C

–55°C

+3.0 +5.0 +5.5 Volts

—

+120 +160 mA

—

+100 +125 mA

—

+135 +175 mA

—

660

880

mW

—

550

690

mW

—

745

965

mW

PHYSICAL ENVIRONMENTAL

Operating Temp. Range, Case:

MM/LM/QL Versions

Storage Temp. Range

Package Type

DIP

LCC

–55

—

+125 °C

–65

—

+150 °C

24-pin ceramic DIP

24-pin ceramic LCC

Footnotes:

➀ Maximum input impedance is a function of clock frequency.

➁ At full-power input.

➂ For 10-step, 40 IRE NTSC ramp test.

TECHNICAL NOTES

1. The Reference ladder is floating with respect to VDD

and may be referenced anywhere within the specified

limits. AC modulation of the reference voltage may also

be utilized; contact DATEL for further information.

2. Clock Pulse Width – To improve performance when input

signals may exceed Nyquist bandwidths, the clock duty

cycle can be adjusted so that the low portion (sample

mode) of the clock pulse is 15nSec wide. Reducing

the sampling time period minimizes the amount the

input voltage slews and prevents the comparators from

saturating.

3. A full-scale input produces all "1" on the data outputs.

4. DATEL uses the conservative definitions when specifying

Intergal Linearity (end-point) and Differential Linearity (code

transition). The specifications using the less conservative

definition have also been provided as a comparative

specification for products specified this way.

DATEL, Inc., Mansfield, MA 02048 (USA) • Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 • E–mail: sales@datel.com • Internet: www.datel.com

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