WM8199 查看數據表（PDF） - Cirrus Logic
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WM8199 Datasheet PDF : 32 Pages
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WM8199
Production Data
Test Conditions
AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25°C, MCLK = 32MHz unless otherwise stated.
PARAMETER
SYMBOL
Programmable Gain Amplifier
Resolution
Gain
Max gain, each channel
Min gain, each channel
Gain error, each channel
Analogue to Digital Converter
Resolution
Speed
Full-scale input range
(2*(VRT-VRB))
DIGITAL SPECIFICATIONS
Digital Inputs
High level input voltage
Low level input voltage
High level input current
Low level input current
Input capacitance
Digital Outputs
High level output voltage
Low level output voltage
High impedance output current
Digital IO Pins
Applied high level input voltage
Applied low level input voltage
High level output voltage
Low level output voltage
Low level input current
High level input current
Input capacitance
High impedance output current
Supply Currents
Total supply current − active
(Three channel mode)
Total supply current − active
(Single channel mode)
Total analogue supply current −
active (Three channel mode)
Total analogue supply current −
active (Single channel mode)
Digital core supply current,
DVDD1 − active (note 1)
Digital I/O supply current,
DVDD2 − active (note 1)
Supply current − full power down
mode
Notes:
GMAX
GMIN
VIH
VIL
IIH
IIL
CI
VOH
VOL
IOZ
VIH
VIL
VOH
VOL
IIL
IIH
CI
IOZ
IAVDD
IAVDD
TEST
CONDITIONS
MIN
TYP
MAX
UNIT
8
208
283 − PGA[7 : 0]
7.43
0.74
1
16
16
3
bits
V/V
V/V
V/V
%
bits
MSPS
V
IOH = 1mA
IOL = 1mA
IOH = 1mA
IOL = 1mA
MCLK = 32Hz
LINEBYLINE = 1
MCLK = 32MHz
MCLK = 32MHz
LINEBYLINE = 1
MCLK = 32MHz
MCLK = 32MHz
MCLK = 32MHz
0.8 ∗ DVDD2
V
0.2 ∗ DVDD2 V
1
µA
1
µA
5
pF
DVDD2 - 0.5
V
0.5
V
1
µA
0.8 ∗ DVDD2
V
0.2 ∗ DVDD2 V
DVDD2 - 0.5
V
0.5
V
1
µA
1
µA
5
pF
1
µA
72
mA
56
mA
65
mA
49
mA
5
mA
2
mA
300
µA
Digital supply current depends on the capacitive load connected to the WM8199 output pins and the clock rate applied to
MCLK. This data is based on a load of approximately 10pF per output pin and MCLK = 16MHz.
w
PD, Rev 4.4, July 2008
7
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