HV440(2001) 查看數據表（PDF） - Supertex Inc
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HV440 Datasheet PDF : 4 Pages
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Block Diagram
VDD
PIN
NIN
EN
Mode
GND
Logic
High
Voltage
Level
Translator
Linear
Reg
Current
Sense
and
Driver
VDD
High
Voltage
Level
Translator
Linear
Reg
Current
Sense
and
Driver
VPP1
Vpsen
Pgate
VPP2
HVOUT
PGND
VNN2
Ngate
Vnsen
VNN1
HV440
Pin Description
VPP1
VPP2
VNN1
VNN2
VDD
GND
PGND
PIN
NIN
EN
Mode
HVOUT
Vpsen
Vnsen
Pgate
Ngate
Positive high voltage supply.
Positive gate voltage supply. Generated by an internal linear regulator. A 0.1µF capacitor should be connected between
VPP2 and VPP1.
Negative high voltage supply.
Negative gate voltage supply. Generated by an internal linear regulator. A 0.1µF capacitor should be connected between
VNN2 and VNN1.
Logic supply voltage.
Low voltage ground.
High voltage power ground.
Logic control input. When mode is high, logic input high turns OFF output high voltage P-Channel.
Logic control input. When mode is high, logic input high turns ON output high voltage N-Channel.
Logic enable bar input. Logic low enables IC.
Logic mode input. Logic low activates 200nsec deadband. When mode is low, NIN turns on and off the high voltage N- and
P-Channels. Pin is not used and should be connected to VDD or ground.
High voltage output. Voltage swings from VPP1 to VNN1.
Pulse by pulse over current sensing for P-Channel MOSFET.
Pulse by pulse over current sensing for N-Channel MOSFET.
Gate drive for external P-channel MOSFET.
Gate drive for external N-channel MOSFET.
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