23C256 查看數據表（PDF） - NEC => Renesas Technology
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23C256 Datasheet PDF : 32 Pages
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µPD23C256112A
Input / Output Pin Functions
Pin name
Input / Output
Function
I/O0 to I/O7
Input, Output I/O port for address input, command input, and data output. I/O pins.
(Address Inputs / Command
Inputs / Data Outputs)
CLE
(Command latch Enable
Input)
Input
Input pin for signal for controlling loading of commands to command register in
device. By making this signal high level at the rising edge or falling edge of the /WE
signal, the data of the I/O0 to I/O7 pins is loaded to the command register as
commands.
ALE
Input
Input pin for signal for controlling loading of address data to the address register in
(Address latch Enable
the device. By making this signal high level at the rising edge or falling edge of the
Input)
/WE signal, the data of the I/O0 to I/O7 pins is loaded as address.
/WE
Input
Input pin for signal for loading the data from the I/O0 to I/O7 pins inside the device.
(Write Enable Input)
/RE
Input
Input pin for signal for serially outputting data. The output data of I/O0 to I/O7 is
(Read Enable Input)
determined after tREA from the falling edge of the /RE signal, and the internal address
counter is incremented by +1 at the rising edge of the /RE signal.
/CE
Input
Input pin for device selection signal. During read, the standby mode is entered by
(Chip Enable Input)
making this signal high level.
R, /B
Output
Output pin for signal that notifies the internal operating status of the device to
(READY, /BUSY Output)
external. This is an open-drain output signal. During read, Busy is output during
operation (R, /B = low level), and upon completion, Ready (R, /B = high level) is
automatically output.
4
Data Sheet M15902EJ2V0DS
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