DS1744WP-120 查看數據表（PDF） - Unspecified

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DS1744WP-120

Y2K-Compliant, Nonvolatile Timekeeping RAMs

Unspecified 

DS1744/DS1744P

Y2K-Compliant, Nonvolatile Timekeeping RAMs

WRITING DATA TO RAM OR CLOCK

The DS1744 is in the write mode whenever and

are in their active state. The start of a write is referenced to the latter

occurring transition of or

. The addresses must be held valid throughout the cycle.

or must return inactive for a

minimum of tWR prior to the initiation of another read or write cycle. Data in must be valid tDS prior to the end of write and remain

valid for tDH afterward. In a typical application, the signal is high during a write cycle. However, can be active provided

that care is taken with the data bus to avoid bus contention. If is low prior to transitioning low, the data bus can become

active with read data defined by the address inputs. A low transition on then disables the output tWEZ after goes active.

DATA-RETENTION MODE

The 5V device is fully accessible and data can be written or read only when VCC is greater than VPF. However, when VCC is below

the power-fail point, VPF (point at which write protection occurs), the internal clock registers and SRAM are blocked from any

access. At this time the power-fail reset-output signal (

) is driven active and remains active until VCC returns to nominal

levels. When VCC falls below the battery switch point VSO (battery supply level), device power is switched from the VCC pin to the

backup battery. RTC operation and SRAM data are maintained from the battery until VCC is returned to nominal levels. The 3.3V

device is fully accessible, and data can be written or read only when VCC is greater than VPF. When VCC falls below VPF access to

the device is inhibited. At this time the power-fail reset-output signal ( ) is driven active and remains active until VCC returns to

nominal levels. If VPF is less than VSO, the device power is switched from VCC to the backup supply (VBAT) when VCC drops below

VPF. If VPF is greater than VSO, the device power is switched from VCC to the backup supply (VBAT) when VCC drops below VSO.

RTC operation and SRAM data are maintained from the battery until VCC is returned to nominal levels. The signal is an

open-drain output and requires a pull up. Except for the

, all control, data, and address signals must be powered down when

VCC is powered down.

BATTERY LONGEVITY

The DS1744 has a lithium power source that is designed to provide energy for clock activity and clock and RAM data retention

when the VCC supply is not present. The capability of this internal power supply is sufficient to power the DS1744 continuously for

the life of the equipment in which it is installed. For specification purposes, the life expectancy is 10 years at +25°C with the

internal clock oscillator running in the absence of VCC power. Each DS1744 is shipped from ARTSCHIP Semiconductor with its

lithium energy source disconnected, guaranteeing full energy capacity. When VCC is first applied at a level greater than VPF, the

lithium energy source is enabled for battery-backup operation. Actual life expectancy of the DS1744 is much longer than 10 years

since no lithium battery energy is consumed when VCC is present.

BATTERY MONITOR

The DS1744 constantly monitors the battery voltage of the internal battery. The battery flag bit (bit 7) of the day register is used to

indicate the voltage-level range of the battery. This bit is not writable and should always be a 1 when read. If a 0 is ever present,

an exhausted lithium energy source is indicated, and both the contents of the RTC and RAM are questionable.

ABSOLUTE MAXIMUM RATINGS

Voltage Range on Any Pin Relative to Ground………………………………………………………………………..-0.3V to +6.0V

Operating Temperature Range……………………………………………………………………-40℃ to +85℃ (noncondensing)

Storage Temperature Range……………………………………………………………………….-40℃ to +85℃ (noncondensing)

Soldering Temperature………………………………………………….See IPC/JEDEC J-STD-020 Specification (EDIP, Note 7)

This is a stress rating only and functional operation of the device at these or any other condition beyond those indicated in the

operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time

can affect reliability.

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