DS1780E 查看數據表（PDF） - Maxim Integrated

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DS1780E

CPU Peripheral Monitor

Maxim Integrated 

DS1780

Note: To properly implement the NAND TREE test on the PCB, no pins listed in the tree should be

connected directly to power or ground; if a pin is needed to configure as a permanent low such as an

address, it should be connected to ground through a low value resister such as 330 (to allow the ATE

(Automatic Test Equipment) to drive it high.

DS1780 NAND TREE TEST FLOW Figure 7

DS1780 REGISTERS AND RAM

INTERNAL ADDRESS REGISTER Table 10.0

BIT

NAME

R/W

DESCRIPTION

<7:0> Address Pointer W Address of RAM and Registers. See the tables below for detail.

ADDRESS POINTER (POWER ON DEFAULT 00h) Table 10.1

REGISTERS AND RAM

<A7:A0>

(HEX)

POWER ON VALUE OF REGISTERS:

<7:0> (BINARY)

Configuration Register

40h

0000 1000

Interrupt INT Status Register 1

41h

0000 0000

Interrupt INT Status Register 2

42h

0000 0000

INT Mask Register 1

43h

0000 0000

INT Mask Register 2

44h

0000 0000

Chassis Intrusion Clear Register

46h

0000 0000

VID Register

47h

<7:4> = 0101, <3:0> = VID3 - VID0

Serial Address Register

48h

0010 1101

VID 4 Register

49h

<7:1> = 1000 000, <0>=VID 4

Temperature Configuration Register 4Bh

0000 0001

Test Register

15h

0000 0000

Analog Output

19h

1111 1111

Value RAM

20h-3Dh

Company ID

3Eh

1101 1010

Stepping

3Fh

0000 0001

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