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AN2125

uPSD3300 Series Design Guide for DK3300-ELCD Using KEIL

STMicroelectronics 

uPSD3300 Series Design Guide for DK3300-ELCD Using KEIL

2 DK3300-ELCD DEVELOPMENT KIT

2.1 Overview

A picture of the DK3300-ELCD board, including the important connections, is shown in Figure

3. A list of jumpers JP0 - JP16 and their functions can be found on the DK3300-ELCD board's

silk screen. For more detailed information on these jumpers, please refer to APPENDIX

A., DK3300-ELCD JUMPERS SELECTION AND DEFAULTS or the DK3300-ELCD User's

Guide. Board layout and schematics are available. Connectors CON1, CON2, and CON3 pro-

vide easy access to all Turbo uPSD signals for expansion or testing. UARTs are available on

connectors marked UART0 and UART1. The FlashLINK/ RLINK-ST/ ULINK JTAG ISP cable

connects at the connector, JTAG. The DK3300-ELCD has a graphical LCD interface and a ful-

ly-featured real-time clock with a back-up battery, a serial EEPROM, IrDA transceiver, PWM

giving control over the LCD brightness, and a rotary encoder knob for selection of various

demo applications. Board layout and schematics are available.

The sample design example code used for this application note is a Keil based project which

shows use of the PWM and ADC function blocks within the uPSD3300 device. A pulse width

modulated signal output from the PWM circuit is tied to an RC circuit resulting in a DC voltage

that is proportional to the pulse width. This DC voltage is input to an ADC channel and is read

after each time the pulse width out of the PWM is changed. The PWM setting and the ADC

value read is displayed on the LCD.

The purpose of using this simple design project is to illustrate and demonstrate the use of Keil

software and tools with the ULINK adapter on a uPSD development board. The Keil tools pro-

vide many features for editing, compiling, programming, and debugging a uPSD3300 MCU

Series from STMicroelectronics. In the following sections, some of the main features are de-

scribed to give you a feel for the simplicity and capabilities of the tools used for this sample

design.

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