74ALVC125-Q100 查看數據表（PDF） - Nexperia B.V. All rights reserved
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74ALVC125-Q100 Datasheet PDF : 15 Pages
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Nexperia
74ALVC125-Q100
Quad buffer/line driver; 3-state
5. Pinning information
5.1 Pinning
74ALVC125-Q100
1OE 1
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND 7
14 VCC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
aaa-008233
Fig 4. Pin configuration SO14 and TSSOP14
74ALVC125-Q100
terminal 1
index area
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND(1)
13 4OE
12 4A
11 4Y
10 3OE
9 3A
aaa-008234
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as a
supply pin or input.
Fig 5. Pin configuration DHVQFN14
5.2 Pin description
Table 2.
Symbol
nA
nY
nOE
VCC
GND
Pin description
Pin
2, 5, 9, 12
3, 6, 8, 11
1, 4, 10, 13
14
7
Description
data input
bus output
output enable (active LOW)
supply voltage
ground (0 V)
6. Functional description
Table 3. Function table[1]
Input
nOE
nA
L
L
L
H
H
X
[1] H = HIGH voltage level
L = LOW voltage level
X= don’t care
Z = high-impedance OFF-state
Output
nY
L
H
Z
74ALVC125_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 20 January 2014
© Nexperia B.V. 2017. All rights reserved
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