74ALVC125-Q100 查看數據表（PDF） - Nexperia B.V. All rights reserved

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74ALVC125-Q100

Quad buffer/line driver; 3-state

Nexperia B.V. All rights reserved 

Nexperia

74ALVC125-Q100

Quad buffer/line driver; 3-state

VI

nOE input

GND

VCC

output

LOW-to-OFF

OFF-to-LOW

VOL

VOH

output

HIGH-to-OFF

OFF-to-HIGH

GND

VM

tPLZ

tPZL

tPHZ

VX

VY

VM

tPZH

VM

outputs

enabled

outputs

disabled

outputs

enabled

mna362

Fig 7.

Measurement points are given in Table 8.

VOL and VOH are the typical output voltage levels that occur with the output load.

Enable and disable times

VI

G

VCC

VO

DUT

RT

VEXT

RL

CL

RL

mna616

Fig 8.

Test data is given in Table 9.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Test circuitry for switching times

Table 9. Test data

Supply voltage

1.65 V to 1.95 V

2.3 V to 2.7 V

2.7 V

3.0 V to 3.6 V

Input

VI

VCC

VCC

2.7 V

2.7 V

tr, tf

 2.0 ns

 2.0 ns

 2.5 ns

 2.5 ns

Load

CL

30 pF

30 pF

50 pF

50 pF

RL

1 k

500 

500 

500 

VEXT

tPLH, tPHL

open

open

open

open

tPLZ, tPZL

2  VCC

2  VCC

6V

6V

tPHZ, tPZH

GND

GND

GND

GND

74ALVC125_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 20 January 2014

© Nexperia B.V. 2017. All rights reserved

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