HSDL-3603-007 查看數據表（PDF） - Avago Technologies

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HSDL-3603-007

IrDA® Data Compliant 4 Mbit/s Infrared Transceiver

Avago Technologies 

Bandwidth Selection Timing

The transceiver is in default SIR/

MIR mode when powered on.

User needs to apply the following

programming sequence to both

the SD and TXD inputs to enable

the transceiver to operate at FIR

mode.

SD/MODE

TXD

VIH

50%

VIL

tS

tH

SD/MODE

50%

50%

VIL

TXD

VIH

50%

VIL

tS

tH

VIH

50%

50%

VIL

Figure 3. Bandwidth selection timing at SIR/MIR mode.

Figure 4. Bandwidth selection timing at FIR mode.

Setting the transceiver to SIR/MIR

Mode (9.6 kb/s to 1.152 Mbit/s)

1. Set SD/Mode input to logic

HIGH

2. TXD input should remain at

logic LOW

3. After waiting for tS ≥ 25 ns,

set SD/Mode to logic LOW, the

HIGH to LOW negative edge

transition will determine the

receiver bandwidth

4. Ensure that TXD input remains

low for tH ≥ 100 ns, the

receiver is now in SIR/MIR

mode

5. SD input pulse width for mode

selection should be > 50 ns.

Setting the transceiver to FIR

(4.0 Mbit/s) Mode

1. Set SD/Mode input to logic

HIGH

2. After SD/Mode input remains

HIGH at > 25ns, set TXD input

to logic HIGH, wait tS ≥ 25 ns

(from 50% of TXD rising edge

till 50% of SD falling edge)

3. Then set SD/Mode to logic

LOW, the HIGH to LOW

negative edge transition will

determine the receiver

bandwidth

4. After waiting for tH ≥ 100ns, set

the TXD input to logic LOW

5. SD input pulse width mode

selection should be > 50ns.

4

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