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ISL6210

Dual Synchronous Rectified MOSFET Drivers

Renesas Electronics 

ISL6210

Timing Diagram

PWM

UGATE

tPDHU

tRU

tPDLU

2.5V

1V

tTSSHD

tRU

tFU

tPTS

LGATE

1V

tPTS

tPDLL

tRL

tPDHL

tTSSHD

tFL

FIGURE 1. TIMING DIAGRAM

Description

Theory of Operation

Designed for speed, the ISL6210 dual MOSFET driver

controls both high-side and low-side N-Channel FETs for two

separate channels of a Multiphase PWM system from two

independent PWM signals.

A rising edge on PWM initiates the turn-off of the lower

MOSFET (see “Timing Diagram” on page 6). After a short

propagation delay [tPDLL], the lower gate begins to fall.

Typical fall times [tFL] are provided in the “Electrical

Specifications” table on page 4. Adaptive shoot-through

circuitry monitors the LGATE voltage. When LGATE has

fallen below 1V, UGATE is allowed to turn ON. This prevents

both the lower and upper MOSFETs from conducting

simultaneously, or shoot-through.

A falling transition on PWM indicates the turn-off of the upper

MOSFET and the turn-on of the lower MOSFET. A short

propagation delay [tPDLU] is encountered before the upper

gate begins to fall [tFU]. The upper MOSFET gate-to-source

voltage is monitored, and the lower gate is allowed to rise

after the upper MOSFET gate-to-source voltage drops below

1V. The lower gate then rises [tRL], turning on the lower

MOSFET.

This driver is optimized for converters with large step down

compared to the upper MOSFET because the lower

MOSFET conducts for a much longer time in a switching

period. The lower gate driver is therefore sized much larger

to meet this application requirement.

The 0.5 ON-resistance and 4A sink current capability

enable the lower gate driver to absorb the current injected to

the lower gate through the drain-to-gate capacitor of the

lower MOSFET and prevent a shoot through caused by the

high dv/dt of the phase node.

Diode Emulation

Diode emulation allows for higher converter efficiency under

light-load situations. With diode emulation active, the

ISL6210 will detect the zero current crossing of the output

inductor and turn off LGATE. This ensures that

discontinuous conduction mode (DCM) is achieved. Diode

emulation is asynchronous to the PWM signal. Therefore,

the ISL6210 will respond to the FCCM input immediately

after it changes state.

Please note that Intersil does not recommend Diode

Emulation use with rDS(ON) current sensing topologies. The

turn-OFF of the low side MOSFET can cause gross current

measurement inaccuracies.

Three-State PWM Input

A unique feature of the ISL6210 and other Intersil drivers is the

addition of a shutdown window to the PWM input. If the PWM

signal enters and remains within the shutdown window for a set

holdoff time, the output drivers are disabled and both MOSFET

gates are pulled and held low. The shutdown state is removed

when the PWM signal moves outside the shutdown window.

Otherwise, the PWM rising and falling thresholds outlined in the

“Electrical Specifications” table on page 4 determine when the

lower and upper gates are enabled.

Adaptive Shoot-Through Protection

Both drivers incorporate adaptive shoot-through protection

to prevent upper and lower MOSFETs from conducting

simultaneously and shorting the input supply. This is

accomplished by ensuring the falling gate has turned off one

MOSFET before the other is allowed to turn on.

FN6392 Rev 1.00

December 9, 2008

Page 6 of 10

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