ISL8204M 查看數據表（PDF） - Renesas Electronics
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ISL8204M Datasheet PDF : 19 Pages
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ISL8204M, ISL8206M
Pin Configuration
ISL8204M, ISL8206M
(15 LD QFN)
TOP AND 3D VIEW
9
8 7 6 54 3 2
PD1
1 PGND
15 NC
14 FB
13 COMP/EN
PHASE 10
PD2
PD4
12 VOUT
PD3
11 PGND
Pin Descriptions
PIN
1, 2, 3, 4
5
6, 8, 15
7
9
10
11
12
SYMBOL
PGND
PVCC
NC
ISET
VIN
(PD1)
PHASE
(PD2)
PGND
(PD3)
VOUT
(PD4)
DESCRIPTION
Power ground pin for signal, input, and output return path. PGND needs to connect to one (or more) ground plane(s)
immediately, which is recommended to minimize the effect of switching noise, copper losses, and maximize heat
dissipation. Range: 0V.
This pin provides the bias supply for ISL8204M, ISL8206M, as well as the low-side MOSFET’s gate and high-side
MOSFET’s gate. If PVCC rises above 6.5V, an internal 5V regulator will supply to the internal logics bias (but high-side
and low-side MOSFET gate will still be sourced by PVCC). Connect a well decoupled +5V or +12V supply to this pin.
Connect 1µF ceramic capacitor to ground plane directly. Range: 4.5V to 14.4V.
No internal connection.
The ISET pin is the input for the overcurrent protection (OCP) setting, which compares the rDS(ON) of the low-side
MOSFET to set the overcurrent threshold. The ISL8204M, ISL8206M has an initial protect overcurrent limit. It has an
integrated internal 4.12k2.87k resistor (RSET-IN) between the ISET and PGND pins, which can prevent significant
overcurrent impact to the module. One can also connect an additional resistor RSET-EX between the ISET pin and the
PGND pin in order to reduce the current limit point by paralleling. Range: 0 to PVCC.
Power input pin. Apply input voltage between the VIN pin and PGND pin. It is recommended to place an input decoupling
capacitor directly between the VIN pin and the PGND pin. The input capacitor should be placed as closely as possible to
the module. Range: 1V to 20V.
The PHASE pin is the switching node between the high and low-side MOSFET. It also returns the current path for the
high-side MOSFET driver and detects the low-side MOSFET drain voltage for the overcurrent limits point. Range: 0V to 30V.
Power ground pin for signal, input, and output return path. PGND needs to connect to one (or more) ground plane(s)
immediately, which is recommended to minimize the effect of switching noise, copper losses, and maximize heat
dissipation. Range: 0V.
Power output pin. Apply output load between this pin and the PGND pin. It is recommended to place a high frequency
output decoupling capacitor directly between the VOUT pin and the PGND pin. The output capacitor should be placed as
closely as possible to the module. Range: 0.6V to 6V.
FN6999 Rev 4.00
October 28, 2014
Page 3 of 19
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