ISL8840AABZ 查看數據表（PDF） - Renesas Electronics

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产品描述 (功能)

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ISL8840AABZ

High Performance Industry Standard Single-Ended Current Mode PWM Controller

Renesas Electronics 

ISL8840A, ISL8841A, ISL8842A, ISL8843A, ISL8844A, ISL8845A

Typical Performance Curves (Continued)

1.001

103

1.000

0.998

0.997

0.996

-60 -40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

FIGURE 3. EA REFERENCE vs TEMPERATURE

100pF

100

220pF

330pF

470pF

1.0nF

10

23..23nnFF

4.7nF

6.8nF

11

10

100

RT (k)

FIGURE 4. RESISTANCE FOR CT CAPACITOR VALUES GIVEN

Pin Descriptions

RTCT - This is the oscillator timing control pin. The operational

frequency and maximum duty cycle are set by connecting a

resistor, RT, between VREF and this pin and a timing capacitor,

CT, from this pin to GND. The oscillator produces a sawtooth

waveform with a programmable frequency range up to

2.0MHz. The charge time, tC, the discharge time, tD, the

switching frequency, f, and the maximum duty cycle, Dmax,

can be approximated from the following equations:

tC  0.533  RT  CT

(EQ. 1)

tD



–RT



C

T



In





0-0---..-00----00---88--------RR-----TT-----––-----13---..--78---13--

(EQ. 2)

f = 1  tC + tD

(EQ. 3)

D = tC  f

(EQ. 4)

The formulae have increased error at higher frequencies due

to propagation delays. Figure 4 may be used as a guideline in

selecting the capacitor and resistor values required for a given

frequency.

COMP - COMP is the output of the error amplifier and the input

of the PWM comparator. The control loop frequency

compensation network is connected between the COMP and

FB pins.

FB - The output voltage feedback is connected to the inverting

input of the error amplifier through this pin. The non-inverting

input of the error amplifier is internally tied to a reference

voltage.

CS - This is the current sense input to the PWM comparator.

The range of the input signal is nominally 0V to 1.0V and has

an internal offset of 100mV.

GND - GND is the power and small signal reference ground for

all functions.

OUT - This is the drive output to the power switching device. It

is a high current output capable of driving the gate of a power

MOSFET with peak currents of 1.0A. This GATE output is

actively held low when VDD is below the UVLO threshold.

VDD - VDD is the power connection for the device. The total

supply current will depend on the load applied to OUT. Total

IDD current is the sum of the operating current and the average

output current. Knowing the operating frequency, f, and the

MOSFET gate charge, Qg, the average output current can be

calculated from:

IOUT = Qg  f

(EQ. 5)

To optimize noise immunity, bypass VDD to GND with a

ceramic capacitor as close to the VDD and GND pins as

possible.

VREF - The 5.00V reference voltage output. +1.0/-1.5%

tolerance over line, load and operating temperature. Bypass to

GND with a 0.1F to 3.3F capacitor to filter this output as

needed.

Functional Description

Features

The ISL884xA current mode PWM makes an ideal choice for

low-cost flyback and forward topology applications. With its

greatly improved performance over industry standard parts, it

is the obvious choice for new designs or existing designs which

require updating.

Oscillator

The ISL884xA has a sawtooth oscillator with a programmable

frequency range to 2MHz, which can be programmed with a

resistor from VREF and a capacitor to GND on the RTCT pin.

(Please refer to Figure 4 for the resistor and capacitance

required for a given frequency.)

FN6320 Rev 3.00

April 18, 2007

Page 10 of 15

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