P89LPC9107 查看數據表（PDF） - NXP Semiconductors.

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P89LPC9107

8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable flash with 8-bit A/D converter

NXP Semiconductors. 

NXP Semiconductors

P89LPC9102/9103/9107

8-bit microcontrollers with two-clock accelerated 80C51 core

7.2 Pin description

Table 4. P89LPC9102 pin description

Symbol

Pin

Type Description

P0.1 to P0.5,

P0.7

I/O

Port 0: Port 0 is an I/O port with a user-configurable output type. During reset Port 0

latches are configured in the input-only mode with the internal pull-up disabled. The

operation of Port 0 pins as inputs and outputs depends upon the port configuration

selected. Each port pin is configured independently. Refer to Section 8.12.1 “Port

configurations” and Table 12 “Static characteristics” for details.

The Keypad Interrupt feature operates with Port 0 pins.

All pins have Schmitt triggered inputs.

Port 0 also provides various special functions as described below:

P0.1/KBI1/ 4

AD10

I/O

P0.1 — Port 0 bit 1.

I

KBI1 — Keyboard input 1.

I

AD10 — ADC1 channel 0 analog input.

P0.2/KBI2/ 1

AD11

I/O

P0.2 — Port 0 bit 2.

I

KBI2 — Keyboard input 2.

I

AD11 — ADC1 channel 1 analog input.

P0.3/CIN1B/ 10

AD12

I/O

P0.3 — Port 0 bit 3.

I

CIN1B — Comparator 1 positive input.

I

AD12 — ADC1 channel 2 analog input.

P0.4/CIN1A/ 9

AD13/DAC1

I/O

P0.4 — Port 0 bit 4.

I

CIN1A — Comparator 1 positive input.

I

AD13 — ADC1 channel 3 analog input.

O

DAC1 — Digital to analog converter output.

P0.5/CMPRE 8

F/CLKIN

I/O

P0.5 — Port 0 bit 5.

I

CMPREF — Comparator reference (negative) input.

I

CLKIN — External clock input.

P0.7/T1/

6

CLKOUT

I/O

P0.7 — Port 0 bit 7.

I/O

T1 — Timer/counter 1 external count input or overflow/PWM output.

I

CLKOUT — Clock output.

P1.2, P1.5

I/O

Port 1: Port 1 is an I/O port with a user-configurable output type. During reset Port 1

latches are configured in the input-only mode with the internal pull-up disabled. The

operation of the configurable Port 1 pins as inputs and outputs depends upon the

port configuration selected. Each of the configurable port pins are programmed

independently. Refer to Section 8.12.1 “Port configurations” and Table 12 “Static

characteristics” for details. P1.5 is input-only.

All pins have Schmitt triggered inputs.

Port 1 also provides various special functions as described below:

P1.2/T0

5

I/O

P1.2 — Port 1 bit 2.

I/O

T0 — Timer/counter 0 external count input or overflow/PWM output.

P89LPC9102_9103_9107_3

Product data sheet

Rev. 03 — 10 July 2007

© NXP B.V. 2007. All rights reserved.

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