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P1800SB 查看數據表(PDF) - Shanghai Leiditech Electronic Technology Co., Ltd

零件编号
产品描述 (功能)
生产厂家
P1800SB
LEIDITECH
Shanghai Leiditech Electronic Technology Co., Ltd LEIDITECH
P1800SB Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Soldering Parameters
-Temperature Min (T ) s(min)
Pre Heat -Temperature Max (T ) s(max)
-Time (Min to Max) (t s)
Average ramp up rate (LiquidusTemp (T L)
to peak)
TS(max) to TL - Ramp-up Rate
-Temperature (T L) (Liquidus)
-Temperature (t L)
Peak Temp (TP)
Time within 5°C of actual PeakTemp (t p)
Ramp-down Rate
Time 2 5°C to PeakTemp (T P)
Do not exceed
Pb-Free assembly
(see Fig. 1)
60-180 secs.
3°C/sec. Max.
3°C/sec. Max.
60-150 secs.
30 secs. Max.
6°C/sec. Max.
8 min. Max.
Thyristor Surge Suppressors
P0060~P3500SA_B_C Series
TP
TL
TS(max)
Figure 1
Ramp-up
TS(min)
Preheat
tS
25
time to peak temperature
(t 2 5ºC to peak)
tP
Critical Zone
TL to T P
tL
Ramp-down
Time
Lead Material
Terminal Finish
Body Material
Copper Alloy
100% Matte-Tin Plated
High Temp Voltage
Blocking
80% Rated VDRM (VAC Peak
504 or 1008 hrs. MIL-STD-750 (Method 1040)
JEDEC, JESD22-A-101
Temp Cycling
Biased Temp &
Humidity
High Temp Storage
Low Temp Storage
cycles. MIL-STD-750 (Method 1051) EIA/JEDEC,
JESD22-A104
52 VDC
JEDEC, JESD22-A-101
JEDEC, JESD22-A-101
-65°C, 1008 hrs.
Thermal Shock
Autoclave (Pressure
Cooker Test)
Resistance to Solder
Heat
Moisture Sensitivity
Level
10 cycles. MIL-STD-750 (Method 1056) JEDEC,
JESD22-A-106
JEDEC, JESD22-A-102
7

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