AD7522KN 查看數據表（PDF） - Analog Devices

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AD7522KN

CMOS 10-Bit, Buffered Multiplying D/A Converter

Analog Devices 

ABSOLUTE MAXIMUM RATINGS

(

VREFtoGND

VDDtoGND

VcctoGND

:!:2SV

+17V

+17V

DAC CIRCUIT DESCRIPTION

GENERAL CIRCUIT INFORMATION

The AD7S22's DAC functional block consists of a highly

stable Silicon Chromium thin film R-2R ladder, and ten

VCCtoVDD"""""""""""""'"

+0.4V SPOT N-channel current steering switches. Most applica-

Output Voltage (pins 6 & 7) . . . . . . . . . . . . . -Q.3Vto VDD tions require the addition of only an output operational

Operating Temperature

amplifier and a voltage or current reference.

IN,KN,LNversions

"""""""""

Oto+70°C

JD, KD,LDversions. . . . . . . . . . . . . . .-2SoC to +8SoC

SO,TD, UDversions. . . . . . . . . . . . . . -55°C to +12SoC

StorageTemperature. . . . . . . . . . . . . . . . -65°C to +lS0oC

Power Dissipation (Package)

Up to +SOoC:

The simplified 01 A circuit is shown in Figure 1. An in-

verted R-2R ladder structUre is used - that is, the binarily

weighted currents are switched between the louT1 and louT2

bus lines, thus maintaining a constant current in each ladder

leg independent of the switch state.

Plastic(SuffixN)

.1200mW

Ceramic (Suffix D) . . . . . . . . . . . . . . . . . . .1000mW

VREF

R

R

R

2R

LDTR

Derate Above +SOOCby

Plastic(SuffixN)

.12mWtC

2R

2R

2R

2R

5-2

Ceramic (Suffix D) . . . . . . . . . . . . . . . . . . 10mWtC

(

Digital Input Voltage Range. . . . . . . . . . . . . .VDDto GND

OCAUTION:

666

MSB

IoUT2

'OUT!

6R

LSB

2" R

2"

RFBI

B1. Do not apply voltages higher than Vcc to SRO.

RFB2

S 2. Do not apply voltages higher than VDD or less than GND to

any other inputloutput terminal except VREF' RFB1 or

Figure 1. DAC Functional Diagram

O RFBZ'

3. The digital control inputs are zener protected, however

EQUIVALENT CIRCUIT

( L permanent damage may occur on unconnected units

The DAC equivalent circuit is shown in Figure 2. The curren

E under high energy electrostatic fields. Keep unused units

in conductive foam at all times.

source ILEAKAGEis composed of surface and junction leak-

ages to the substrate, while the IREF/1024 current source

TE 4. VCCshould never exceed VDD by more than OAV,

represents the 1LSB of current lost through the ladder termi

especially during power ON or OFF sequencing.

nation resistor to ground. The CuUTl and CuUTZ output

capacitances are as shown when the DAC latches feed the

DAC with all "1 's." If the DAC latches are loaded with all

TERMINOLOGY

"O's," CuUTl is 37pF, while CoUT2 is 120pF. In addition,

RESOLUTION

CSD is replaced by 10 ohms, and the 10 ohm RON in IOUTl

is replaced by a CSD of 10pF. When fast amplifiers are used,

Value of the LSB. For example, a unipolar n-bit converter

it will be necessary to provide phase compensation (in the

has a resolution of (2-n) (VREF)' A bipolar n-bit converter

form of feedback capacitance) to cancel the pole formed by

has a resolution of [2-(n-1)] [VREF]' Resolution in no way

RFEEDBACKand CuUT if stability is to be maintained.

im plies lineari ty .

GAIN

CpARASITIC

~0.2pF

RFEEOBACK

10K

The "gain" of a converter is that analog scale factor setting

that establishes the nominal conversion relationship, e.g.,

10V full scale. It is a linear error which can be externally

adjusted (see gain adjusrment on next page).

OUTPUT LEAKAGE CURRENT

Current which appears on the OUT1 terminal when the DAC

register is loaded with all "O's" or on the OUT2 terminal

when the DAC register is loaded with all "1 's."

VREF- ~'

INPUT

r R~A~-O-;R- --jI-- - - - - - - - - - NOMINAL

I 10K

NOMINAL

I

I~I

I

102,4

I

I

I

I

loUT!

'OUT2

I

I

L--H

CpARAsmc

~0.2pF

COD

10pF

J

Figure 2. Equivalent Circuit (Shown for all Digital

Inputs High)

-3-

-

- - --

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