AD7760BCP 查看數據表（PDF） - Analog Devices

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AD7760BCP

2.5 MSPS, 20-Bit Σ∆ ADC

Analog Devices 

AD7760

PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS

Preliminary Technical Data

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

DGND 1

MCLK 2

MCLK 3

AVDD2 4

AGND 5

AVDD1 6

AGND 7

DECAP1 8

REFGND 9

VREF+ 10

AGND 11

AVDD4 12

AGND 13

AVDD2 14

AVDD2 15

AGND 16

PIN 1

IDENTIFIER

AD7760

TOP VIEW

(Not to Scale)

48 DB12

47 DB13

46 DB14

45 DB15

44 VDRIVE

43 DGND

42 DGND

41 DVDD

40 CS

39 RD/WR

38 DRDY

37 RESET

36 SYNC

35 DGND

34 AGND

33 AVDD1

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

VDRIVE 1

MCLK 2

MCLK 3

AVDD2 4

AVDD1 5

DECAP1 6

REFGND 7

VREF+ 8

AVDD4 9

AVDD2 10

AVDD2 11

RBIAS 12

PIN 1

IDENTIFIER

AD7760

TOP VIEW

(Not to Scale)

36 DB12

35 DB13

34 DB14

33 DB15

32 VDRIVE

31 DVDD

30 CS

29 RD/WR

28 DRDY

27 RESET

26 SYNC

25 AVDD1

Figure 6. 48-PIN LFCSP Pin Configuration

Figure 5. 64-Lead TQFP Pin Configuration

Table 4. Pin Function Descriptions

TQFP Pin CSP Pin Pin Mnemonic

Number Number

6, 33

5, 25

AVDD1

4, 14, 15,

27

24

4, 10, 11,

20

17

AVDD2

AVDD3

12

9

AVDD4

5, 7, 11,

13, 16, 18,

23, 28, 31,

32, 34

9

41

23, 24,

Paddle

7

31

AGND

REFGND

DVDD

44, 63

1, 32

VDRIVE

1, 35, 42,

43, 53, 62,

64

Paddle

DGND

Description

+2.5V power supply for modulator. These pins should be decoupled to AGND with 100nF and

10µF capacitors on each pin.

+5V power supply. These pins should be decoupled to AGND with TBD nF and TBD µF

capacitors on each pin.

+3.3V to +5V power supply for differential amplifier. These pins should be decoupled to AGND

with a 100nF capacitor.

+3.3V to +5V power supply for reference buffer. This pin should be decoupled to AGND with a

10nF capacitor in series with a 22Ω resistor.

Power supply ground for analog circuitry. In the Chip Scale package, most of the internal

AGND pads are down-bonded to the exposed paddle. This paddle then become the main

analog ground connection for the AD7760.

Reference Ground. Ground connection for the reference voltage.

+2.5V power supply for digital circuitry and FIR filter. This pin should be decoupled to DGND

with a 470nF capacitor.

Logic power supply input, +1.8V to +2.5V. The voltage supplied at these pins will determine

the operating voltage of the logic interface. Both these pins must be connected together and

tied to the same supply. Each pin should also be decoupled to DGND with a 470nF capacitor.

Ground Reference for digital circuitry. In the Chip Scale package, all the internal DGND pads

are down-bonded to the exposed paddle. This paddle then becomes the single ground

connection for the AD7760.

Rev. PrN | Page 8 of 22

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