M65677FP 查看數據表（PDF） - MITSUBISHI ELECTRIC
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M65677FP Datasheet PDF : 6 Pages
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MITSUBISHI ICs (TV)
M65677FP
DIGITAL NTSC/PAL ENCODER
DESCRIPTION OF PIN (cont.)
Pin No. Pin name Type
Function
42
Ccomp
I
Phase compensation for chroma or V output DAC.
It should be connected to the analog ground via a capacitor.
43
DAC
Chroma or V signal output.
O The DAC output should be connected to the analog supply via a load resistor (RL).
The output amplitude is set up by reference resistor (Rref) and RL.
44
AV DD1
Supply Analog supply for DACs.
45
AV SS1
Supply Analog ground for DACs.
46
DAY
Luma or U signal output.
O It should be connected to the analog supply via a load resistor (RL).
The output amplitude is set up by reference resistor (Rref) and RL.
47
Cref
I
A reference current source for chroma or V signal output DAC.
It should be connected to the analog supply via a reference resistor (Rref).
48
Yref
I
A reference current source for Y or U DAC.
It should be connected to the analog supply via a reference resistor (Rref).
49
Ycomp
I
Phase compensation for Y or U DAC.
It should be connected to the analog ground via a capacitor.
50
N.C.
No connection.
51
DVDD1
Supply Digital supply for the internal logic.
52
DVSS1
Supply Digital ground for the internal logic.
53
Xout
O
System clock output.
It must be in no connection except for a connection to a X'tal oscillator.
54
Xin
I
System clock input.
The clock frequency is only 27.0MHz.
55
DVSS2
Supply Digital ground for the I/O.
56
PXD7
57
PXD6
58
PXD5
59
PXD4
60
PXD3
61
PXD2
62
PXD1
Pixel data inputs.
The acceptable video data are;
I
• multiplexed video data (Y/Cb/Cr) including timing reference code of SAV and EAV, defined in
CCIR Rec656
• multiplexed video data (Y/Cb/Cr) defined in CCIR Rec601
MSB and LSB is PXD7 and PXD0, respectively.
63
PXD0
64
DVDD2
Supply Digital supply for the I/O.
5
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