SST65P542R-8-C-SG 查看數據表（PDF） - Silicon Storage Technology
零件编号
产品描述 (功能)
生产厂家
SST65P542R-8-C-SG Datasheet PDF : 41 Pages
| |||
Remote Controller MCU
SST65P542R
Data Sheet
3.1 I/O Registers
The 32 Bytes of I/O registers occupy address locations from 0000H to 001FH that include general purpose I/O reg-
isters, the SuperFlash Function Register, and on-chip peripheral control registers.
TABLE 3-1: REGISTER DESCRIPTIONS AND BIT DEFINITIONS (1 OF 2)
Symbol1
PORTA
PORTB
PORTC
-
DDRA
DDRB
DDRC
-
CTSCR
CTCR
PBIC
SFFR
PBPUC
CWTC
-
-
CHR1
CLR1
CHR2
Description
Port A Data
Register
Port B Data
Register
Port C Data
Register
Reserved
Port A Data
Direction
Register
Port B Data
Direction
Register
Port C Data
Direction
Register
Reserved
Core Timer
Control and
Status
Register
Core Timer
Counter
Register
Port B
Interrupt
Control
Register
SuperFlash
Function
Register
Port B Pull-up
Control
Register
CWT Control
Register
Reserved
Reserved
Carrier
Generator
High Data
Register 1
Carrier
Generator
Low Data
Register 1
Carrier
Generator
High Data
Register 2
Direct
Address
0000H
0001H
0002H
0003H
0004H
0005H
0006H
0007H
0008H
0009H
000AH
000BH
000CH
000DH
000EH
000FH
0010H
0011H
0012H
Bit 7
PA7
PB7
-
-
DDRA7
DDRB7
-
-
CTOF
CTD7
INPRB7
PREN
-
-
-
-
IROLN
IROLP
-
Bit 6
PA6
PB6
-
-
DDRA6
DDRB6
-
-
RTIF
CTD6
INPRB6
MEREN
-
-
-
-
CMTPOL
-
-
Bit Address, Bit Symbol
Bit 5 Bit 4 Bit 3 Bit 2
PA5
PA4
PA3
PA2
PB5
PB4
PB3
PB2
-
-
PC3
PC2
-
-
-
-
DDRA5 DDRA4 DDRA3 DDRA2
DDRB5 DDRB4 DDRB3 DDRB2
-
-
DDRC3 DDRC2
-
TOFE
-
RTIE
-
TOFC
-
RTFC
CTD5 CTD4 CTD3 CTD2
INPRB5 INPRB4 INPRB3 INPRB2
SEREN
-
PROG MERA
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PH5
PH4
PH3
PH2
PL5
PL4
PL3
PL2
SH5
SH4
SH3
SH2
Bit 1
PA1
PB1
PC1
-
DDRA1
DDRB1
DDRC1
-
RT1
CTD1
INPRB1
SERA
PU1
-
-
-
PH1
PL1
SH1
Bit 0
PA0
PB0
PC0
-
DDRA0
DDRB0
DDRC0
-
RT0
CTD0
INPRB0
-
PU0
CWT_EN
-
-
PH0
PL0
SH0
Reset
Value2,3
00H
00H
00H
-
00H
00H
00H
-
03H
00H
00H
00H
03H
00000001b
-
-
00UUUUUUb
00UUUUUUb
00UUUUUUb
©2005 Silicon Storage Technology, Inc.
8
S71170-06-000
7/05
Share Link: 