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M34250M2 查看數據表(PDF) - Renesas Electronics

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M34250M2
Renesas
Renesas Electronics Renesas
M34250M2 Datasheet PDF : 59 Pages
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MITSUBISHI MICROCOMPUTERS
4250 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
(5) Port F (F0, F1)
2-bit I/O port.
For input use, set the latch of the specified bit to “1.” The output
structure is the N-channel open-drain.
(6) Port S (S0–S3)
4-bit I/O port.
Port S has the logic operation (LGOP) function. For input (logic
operation included) use, set the latch of the specified bit to
“1.” The output structure is the N-channel open-drain. When
performing the logic operation, select the logic operation
function with the logic operation selection register LO. Set the
contents of register LO through register A with the TLOA
instruction.
When the LGOP instruction is executed, the logic operation
selected with the register LO is performed between the
contents of register A and the contents of port S, and its result
is stored in register A.
Logic operation selection register
Logic operation selection register LO
at reset : 002
at RAM back-up : 002
W
LO1
Logic operation function selection bits
LO0
Note: “W” represents write enabled.
LO1 LO0
0 0 XOR operation
0 1 OR operation
1 0 AND operation
1 1 Not available
Functions
8

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