PCA9554PW,118 查看數據表（PDF） - NXP Semiconductors.
零件编号
产品描述 (功能)
生产厂家
PCA9554PW,118 Datasheet PDF : 35 Pages
| |||
NXP Semiconductors
PCA9554; PCA9554A
8-bit I2C-bus and SMBus I/O port with interrupt
6.5 Device address
slave address
0 1 0 0 A2 A1 A0 R/W
fixed
hardware
selectable
002aac494
Fig 9. PCA9554 device address
slave address
0 1 1 1 A2 A1 A0 R/W
fixed
hardware
selectable
002aac495
Fig 10. PCA9554A device address
6.6 Bus transactions
Data is transmitted to the PCA9554/PCA9554A registers using the Write mode as shown
in Figure 11 and Figure 12. Data is read from the PCA9554/PCA9554A registers using the
Read mode as shown in Figure 13 and Figure 14. These devices do not implement an
auto-increment function, so once a command byte has been sent, the register which was
addressed will continue to be accessed by reads until a new command byte has been
sent.
SCL 1 2 3 4 5 6 7 8 9
slave address
command byte
SDA S 0 1 0 0 A2 A1 A0 0 A 0 0 0 0 0 0 0 1 A
START condition
write to port
R/W
acknowledge
from slave
acknowledge
from slave
data out
from port
Fig 11. Write to Output Port register
data to port
DATA 1
AP
acknowledge STOP
from slave condition
tv(Q)
data 1 valid
002aac472
SCL 1 2 3 4 5 6 7 8 9
slave address
command byte
SDA S 0 1 0 0 A2 A1 A0 0 A 0 0 0 0 0 0 1 1/0 A
START condition
data to
register
R/W
acknowledge
from slave
acknowledge
from slave
Fig 12. Write to Configuration register or Polarity Inversion register
data to register
DATA
AP
acknowledge STOP
from slave condition
002aac473
PCA9554_9554A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 8 November 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
10 of 35
Share Link: 