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EK42553-01 查看數據表(PDF) - Peregrine Semiconductor Corp.

零件编号
产品描述 (功能)
生产厂家
EK42553-01
PEREGRINE
Peregrine Semiconductor Corp. PEREGRINE
EK42553-01 Datasheet PDF : 19 Pages
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PE42553
UltraCMOS® SPDT RF Switch
Table 3 • PE42553 Electrical Specifications
Parameter
Path
Condition
Min Typ Max Unit
Input 0.1dB compression
point(3)
RFC–RFX
10 MHz–8 GHz
Fig. 4
Fig. 5
Input IP2
RFC–RFX
834 MHz, 1950 MHz
120
Input IP3
RFC–RFX
834 MHz, 1950 MHz and 2700 MHz
66
Settling time
50% CTRL to 0.05 dB final value
15
20
Switching time
50% CTRL to 90% or 10% of RF
5.5
9.5
Notes:
1) Normal mode: connect VSS_EXT (pin 29) to GND (VSS_EXT = 0V) to enable internal negative voltage generator.
2) Bypass mode: use VSS_EXT (pin 29) to bypass and disable internal negative voltage generator.
3) The input 0.1dB compression point is a linearity figure of merit. Refer to Table 2 for the RF input power (50Ω).
dBm
dBm
dBm
dBm
μs
μs
Switching Frequency
The PE42553 has a maximum 25 kHz switching rate
in normal mode (pin 13 tied to ground). A faster
switching rate is available in bypass mode (pin 13 tied
to VSS_EXT). The rate at which the PE42553 can be
switched is then limited to the switching time as
specified in Table 3.
Switching frequency describes the time duration
between switching events. Switching time is the time
duration between the point the control signal reached
50% of the final value and the point the output signal
reaches within 10% or 90% of its target value.
Spur-Free Performance
The typical spurious performance of the PE42553 in
normal mode is –152 dBm (pin 13 tied to ground). If
spur-free performance is desired, the internal
negative voltage generator can be disabled by
applying a negative voltage to VSS_EXT (pin 13).
Logic Select
The Logic Select feature is used to determine the
definition for the CTRL pin.
Control Logic
Table 4 provides the control logic truth table for the
PE42553.
Table 4 • Truth Table for PE42553
LS
CTRL RFC–RF1 RFC–RF2
0
0
OFF
ON
0
1
ON
OFF
1
0
ON
OFF
1
1
OFF
ON
DOC-62463-2 – (11/2014)
www.psemi.com
Page 5

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