PE9721 查看數據表（PDF） - Peregrine Semiconductor Corp.
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PE9721 Datasheet PDF : 13 Pages
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PE9721
Preliminary Specification
Pin No. Pin Name Type
Description
21
N/C
No connection.
22
EESel
Input
Control line for Frequency Register selection, EE Register parallel loading, and EEPROM programming.
Internal 70kΩ pull-up resistor.
23
GND
Ground.
24
fr
Input
Reference frequency input.
Note 1: VDD pins 1, 10 and 19 are connected by diodes and must be supplied with the same positive voltage level.
Table 2. Absolute Maximum Ratings
Symbol Parameter/Conditions Min
VDD
Supply voltage
–0.3
VI
Voltage on any digital input –0.3
TStg
Storage temperature range –65
Max Units
+4.0
V
VDD+0.3 V
+85
°C
Table 3. Operating Ratings
Symbol Parameter/Conditions Min
VDD
Supply voltage
TA
Operating ambient
temperature range
2.85
-40
Max
3.15
85
Units
V
°C
Electrostatic Discharge (ESD) Precautions
When handling this UTSi device, observe the
same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UTSi CMOS
devices are immune to latch-up.
Table 4. ESD Ratings
Symbol
VESD
VESD
(VPP)
Parameter/Conditions
ESD voltage human body
model (Note 1)
ESD voltage human body
model (Note 1)
Min
1000
200
Max Units
V
V
Note 1: Periodically sampled, not 100% tested. Tested per MIL-STD-883,
M3015 C2; 2 KV
PEREGRINE SEMICONDUCTOR CORP. | http://www.peregrine-semi.com
Copyright Peregrine Semiconductor Corp. 2003
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