UT52L1616MC-8 查看數據表（PDF） - Utron Technology Inc

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UT52L1616MC-8

1M X 16 BIT SDRAM

Utron Technology Inc 



UTRON

Preliminary Rev. 0.91

UT52L1616

1M X 16 BIT SDRAM

COMMAND OPERATION

Command Truth Table

The synchronous DRAM recognizes the following commands specified by the CE , CAS , RAS , WE and address pins.

Function

Symbol CKE n-1 CKe n CE RAS CAS WE A11 A10 A0 to A9

Ignore command

DESL

H

x

Hx

x x xx

x

Mode register set

MRS

H

x

LL

L L VV

V

Refresh

REF/SELF

H

V

LL

L Hxx

x

Precharge select bank

PRE

H

x

LL

H L VL

x

Precharge all bank

PALL

H

x

LL

H L xH

x

Bank active

ACT

H

x

LL

H H VV

V

Column address and write WRIT

H

x

LH

L L VL

V

command

Write with auto-precharge

WRITA

H

x

LH

L L VH

V

Column address and read READ

H

x

LH

L HVL

V

command

Read with auto-precharge

READA

H

x

LH

L H VH

V

Burst stop in full page

BST

H

x

LH

H

L xx

x

No operation

NOP

H

x

LH

H Hxx

x

Note: H: VIH. L: VIL. x: VIH or VIL. V: Valid address input.

Ignore Command [DESL]: When this command is set ( CE is High), the synchronous DRAM ignore

command input at the clock. However, the internal status is held.

Mode register set [MRS]: Synchronous DRAM has a mode register that defines how it operates. The mode

register is specified by the address pins (A0 to A11) at the mode register set cycle. For details, refer to the mode

register configuration. After power on, the contents of the mode register are undefined, execute the mode register

set command to set up the mode register.

Refresh [REF/SELF]: This command starts the refresh operation. There are two types of refresh operation, the

one is auto refresh, and the other is self refresh. For details, refer to the CKE truth table section.

Precharge selected bank [PRE]: This command starts precharge operation for the bank selected by A11. If

A11 is Low, bank 0 is selected. If A11 is High, bank 1 is selected.

Precharge all banks [PALL]: This command starts a precharge operation for all banks.

Row address strobe and bank activate [ACT]: This command activates the bank that is selected by A11

(BS) and determines the row address (AX0 to AX10). When A11 is Low, bank 0 is activated. When A11 is High,

bank 1 is activated.

Column address strobe and write command [WRIT]: This command starts a write operation. When the

burst write mode is selected, the column address (AY0 to AY7) and the bank select address (A11) become the

burst write start address. When the single write mode is selected, data is only written to the location specified by

the column address (AY0 to AY7) and the bank select address (A11).

Write with auto precharge [WRIT A]: This command automatically performs a precharge operation after a

burst write with a length of 1, 2, 4 or 8.

Column address strobe and read command [READ]: This command starts a read operation. In addition,

the start address of burst read is determined by the column address (AY0 to AY7) and the bank select address

(BS). After the read operation, the output buffer becomes High-Z.

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882 FAX: 886-3-5777919

5

P90004

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