NCP1232DR2 查看數據表（PDF） - ON Semiconductor

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NCP1232DR2

Microprocessor Monitor

ON Semiconductor 

Pin No.

(8-Pin SOIC)

1

2

3

4

5

6

7

8

NCP1232

PIN DESCRIPTION

Symbol

PB RST

TD

TOL

GND

RST

RST

ST

VCC

Description

Push-button Reset Input. A debounced active-low input that ignores pulses less than 1 msec in

duration and is guaranteed to recognize inputs of 20 msec or greater.

Time Delay Set. The watchdog time-out select input (tTD = 150 msec for

TD = 0 V, tTD = 600 msec for TD = open, tTD = 1.2 sec for TD = VCC.)

Tolerance Input. Connect to GND for 5% tolerance or to VCC for 10% tolerance.

Ground.

Reset Output (Active High) - goes active:

1. If VCC falls below the selected reset voltage threshold

2. If PB RST is forced low

3. If ST is not strobed within the minimum time-out period

4. During power-up

Reset Output (Active Low, Open Drain) - see RST.

Strobe Input. Input for watchdog timer.

The +5 V Power Supply Input.

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3

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