CS8900-CQ 查看數據表（PDF） - Cirrus Logic

零件编号

产品描述 (功能)

生产厂家

CS8900-CQ

Highly-Integrated ISA Ethernet Controller

Cirrus Logic 

CS8900

2.2 Pin Description

ISA Bus Interface

Symbol Pin Number

SA0-SA11

SA12-SA16

SA17-SA19

37-48

50-54

58-60

SD0-SD3

SD4-SD7

SD8-SD11

SD12-SD15

RESET

65-68

71-74

27-24

21-18

75

AEN

63

MEMR

29

MEMW

28

MEMCS16

34

REFRESH

49

IOR

61

IOW

62

IOCS16

33

Type

I

B24

I

I

I

I

OD24

I

I

I

OD24

Description

System Address Bus: Lower 20 bits of the 24-bit System Address Bus

used to decode accesses to CS8900 I/O and Memory space, and attached

Boot PROM. SA0-SA15 are used for I/O Read and Write operations.

SA0-SA19 are used in conjunction with external decode logic for Memory

Read and Write operations.

System Data Bus: Bi-directional 16-bit System Data Bus used to transfer

data between the CS8900 and the host.

Reset: Active-high asynchronous input used to reset the CS8900. Must

be stable for at least 400 ns before the CS8900 recognizes the signal as a

valid reset.

Address Enable: When TESTSEL is high, this active-high input indicates

to the CS8900 that the system DMA controller has control of the ISA bus.

When AEN is high, the CS8900 will not perform slave I/O space

operations. When TESTSEL is low, this pin becomes the shift clock input

for the Boundary Scan Test.

Memory Read: Active-low input indicates that the host is executing a

Memory Read operation.

Memory Write: Active-low input indicates that the host is executing a

Memory Write operation.

Memory Chip Select 16-bit: Open-drain, active-low output generated by

the CS8900 when it recognizes an address on the ISA bus that

corresponds to its assigned Memory space (CS8900 must be in Memory

Mode with the MemoryE bit (Register 17, BusCTL, Bit A) set for

MEMCS16 to go active). Tri-stated when not active.

Refresh: Active-low input indicates to the CS8900 that a DRAM refresh

cycle is in progress. When REFRESH is low, MEMR, MEMW, IOR, IOW,

DMACK0, DMACK1, and DMACK2 are ignored.

I/O Read: When IOR is low and a valid address is detected, the CS8900

outputs the contents of the selected 16-bit I/O register onto the System

Data Bus. IOR is ignored if REFRESH is low.

I/O Write: When IOW is low and a valid address is detected, the CS8900

writes the data on the System Data Bus into the selected 16-bit I/O

register. IOW is ignored if REFRESH is low.

I/O Chip Select 16-bit: Open-drain, active-low output generated by the

CS8900 when it recognizes an address on the ISA bus that corresponds to

its assigned I/O space. Tri-stated when not active.

Pin Types:

dI = Differential Input Pair

I

dO = Differential Output Pair

O

B = Bi-Directional with Tri-State Output P

OD = Open Drain Output

= Input

= Output

= Power

G = Ground

ts = Tri-State

w = Internal Weak Pullup

Digital outputs are followed by drive in mA (Example: OD24 = Open Drain Output with 24 mA drive).

DS150PP2

9

Share Link: