AV9148F-12 查看數據表（PDF） - Integrated Circuit Systems

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AV9148F-12

Pentium/Pro™ System Clock Chip

Integrated Circuit Systems 

ICS9148-12

Byte 1: CPU, 24/48 MHz Clock Register

BIT

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PIN#

23

22

-

-

38

39

41

42

PWD

1

1

1

1

1

1

1

1

DESCRIPTION

48/24 MHz (Act/Inact)

48/24 MHz (Act/Inact)

Reserved

Reserved

CPUCLK3 (Act/Inact)

CPUCLK2 (Act/Inact)

CPUCLK1 (Act/Inact)

CPUCLK0 (Act/Inact)

Notes: 1 = Enabled; 0 = Disabled, outputs held low

Byte 3: SDRAM Clock Register

BIT

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PIN#

26

27

29

30

32

33

35

36

PWD

DESCRIPTION

1 SDRAM7 (Act/Inact)

1 SDRAM6 (Act/Inact)

1 SDRAM5 (Act/Inact)

1 SDRAM4 (Act/Inact)

1 SDRAM3 (Act/Inact)

1 SDRAM2 (Act/Inact)

1 SDRAM1(Act/Inact)

1 SDRAM0 (Act/Inact)

Notes: 1 = Enabled; 0 = Disabled, outputs held low

Byte 5: Peripheral Clock Register

BIT

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PIN#

-

-

-

45

-

-

1

2

PWD

DESCRIPTION

1 Reserved

1 Reserved

1 Reserved

1 IOAPIC0 (Act/Inact)

1 Reserved

1 Reserved

1 REF1 (Act/Inact)

1 REF0 (Act/Inact)

Notes: 1 = Enabled; 0 = Disabled, outputs held low

Note: PWD = Power-Up Default

Note: PWD = Power-Up Default

Byte 2: PCICLK Clock Register

BIT

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PIN#

-

8

16

14

13

12

11

9

PWD

1

1

1

1

1

1

1

1

DESCRIPTION

Reserved

PCICLK_F (Act/Inact)

PCICLK5 (Act/Inact)

PCICLK4 (Act/Inact)

PCICLK3 (Act/Inact)

PCICLK2 (Act/Inact)

PCICLK1 (Act/Inact)

PCICLK0 (Act/Inact)

Notes: 1 = Enabled; 0 = Disabled, outputs held low

Byte 4: SDRAM Clock Register

BIT

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PIN#

-

-

-

-

-

-

-

-

PWD

DESCRIPTION

1 Reserved

1 Reserved

1 Reserved

1 Reserved

1 Reserved

1 Reserved

1 Reserved

1 Reserved

Notes: 1 = Enabled; 0 = Disabled, outputs held low

Byte 6: Optional Register for Future

BIT

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PIN#

-

-

-

-

-

-

-

-

PWD

DESCRIPTION

1 Reserved

1 Reserved

1 Reserved

1 Reserved

1 Reserved

1 Reserved

1 Reserved

1 Reserved

Notes:

1. Byte 6 is reserved by Integrated Circuit Systems for

future applications.

8

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