IDT54FCT162H272ATE 查看數據表（PDF） - Integrated Device Technology
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IDT54FCT162H272ATE Datasheet PDF : 8 Pages
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IDT54/74FCT162H272AT/CT/ET
FAST CMOS 12-BIT SYNCHRONOUS TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
PIN DESCRIPTION
Signal
A(1:12)
1B(1:12)
2B(1:12)
I/O
Description
I/O Bidirectional Data Port A. Usually connected to the CPU's Address/Data bus.(1)
I/O Bidirectional Data Port 1B. Usually connected to the even path or even bank of memory.(1)
I/O Bidirectional Data Port 2B. Usually connected to the odd path or odd bank of memory.(1)
CLK
CEA1B
CEA2B
CE1B
CE2B
I Clock Input.
I
Clock Enable Input for the A-1B Register. If CEA1B is LOW during the rising edge of CLK, data will be clocked
into register A-1B (Active LOW).
I
Clock Enable Input for the A-2B Register. If CEA2B is LOW during the rising edge of CLK, data will be clocked
into register A-2B (Active LOW).
I
Clock Enable Input for the 1B-A Register. If CE1B is LOW during the rising edge of CLK, data will be clocked into
register 1B-A (Active LOW).
I
Clock Enable Input for the 2B-A Register. If CE2B is LOW during the rising edge of CLK, data will be clocked into
register 2B-A (Active LOW).
SEL
OEA
OEB
I 1B or 2B Path Selection. When HIGH during the rising edge of CLK, SEL enables data transfer from 1B Port to
A Port. When LOW during the rising edge of CLK, SEL enables data transfer from 2B Port to A Port.
I Synchronous Output Enable for A Port (Active LOW).
I Synchronous Output Enable for 1B Port and 2B Port (Active LOW).
NOTES:
1. On FCT162H272T these pins have "Bus Hold". All other pins are standard inputs, outputs or I/Os.
3071 tbl 01
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
VTERM(2) Terminal Voltage with Respect to
GND
VTERM(3) Terminal Voltage with Respect to
GND
TSTG Storage Temperature
Max.
–0.5 to +7.0
–0.5 to
VCC +0.5
–65 to +150
Unit
V
V
°C
IOUT DC Output Current
–60 to +120 mA
NOTES:
3071 tbl 02
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other condi-
tions above those indicated in the operational sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
CAPACITANCE (TA = +25°C, F = 1.0MHZ)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN
Input
VIN = 0V
3.5 6.0 pF
Capacitance
CI/O
I/O
VOUT = 0V 3.5 8.0 pF
Capacitance
NOTE:
3071 tbl 03
1. This parameter is measured at characterization but not tested.
FUNCTION TABLES(2)
Inputs
Output
1B 2B SEL CE1B CE2B OEA CLK A
H
X
H
L
X
L
↑
H
L
X
H
L
X
L
↑
L
X
X
H
H
X
L
↑
A(1)
X
H
L
X
L
L
↑
H
X
L
L
X
L
L
↑
L
X
X
L
X
H
L
↑
A(1)
X
X
X
X
X
H
↑
Z
3071 tbl 04
Inputs
A CEA1B CEA2B OEB CLK
Outputs
1B
2B
H
L
L
L
↑
H
H
L
L
L
L
↑
L
L
H
L
H
L
↑
H
B(1)
L
L
H
L
↑
L
B(1)
H
H
L
L
↑
B(1)
H
L
H
L
L
↑
B(1)
L
X
H
H
L
↑
B(1)
B(1)
X
X
X
H
↑
Z
Z
X
X
X
L
↑ Active Active
NOTES:
3071 tbl 05
1. Output level before the indicated steady-state input conditions were
established.
2. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
↑ = LOW-to-HIGH Transition
5.5
3
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