IDT79R4640100DU 查看數據表（PDF） - Integrated Device Technology

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IDT79R4640100DU

LOW-COST EMBEDDED ORION™ RISC MICROPROCESSOR

Integrated Device Technology 

Integrated Device Technology, Inc.

LOW-COST EMBEDDED

ORION™ RISC

MICROPROCESSOR

IDT79R4640™

IDT79RV4640™

FEATURES

• High-performance embedded 64-bit microprocessor

- 64-bit integer operations

- 64-bit registers

- Based on the MIPS RISC Architecture

- 80MHz, 100MHz, 133 MHz and 150MHz operation

frequency

- 32-bit bus interface brings 64-bit power to 32-bit sys-

tem cost

• High-performance DSP capability

- 75 Million Integer Mul-Accumulate operations/sec

@150MHz

- 50 MFlops floating-point operations @150MHz

• High-performance microprocessor

- 75 M Mul-Add/second @150MHz

- 50 MFlops @150MHz

- >340,000 dhrystone (2.1)/sec capability @133MHz

(197 dhrystone MIPS)

• High level of integration

- 64-bit, 150 MHz integer CPU

- 50MFlops single-precision floating-point unit

- 8KB instruction cache; 8KB data cache

- Integer multiply unit with 75M Mul-Add/sec

• Upwardly software compatible with IDT RISController

Family

• Easily upgradable to 64-bit system

• Low-power operation

- Active power management powers-down inactive

units

- Standby mode

• Large, efficient on-chip caches

- Separate 8KB Instruction and 8KB Data caches

- Over 1800MB/sec bandwidth from internal caches

- 2-set associative

- Write-back and write-through support

- Cache locking to facilitate deterministic response

- High performance write protocols for graphics and

data communications

• Bus compatible with ORION family

- System interfaces to 67 MHz, provides bandwidth

up to 266 MB/sec

- Direct interface to 32-bit wide systems

- Synchronized to external reference clock for multi-

master operation

• Improved real-time support

- Fast interrupt decode

- Optional cache locking

BLOCK DIAGRAM

150 MHz 64-bit ORION CPU

64-bit Register File

64-bit Adder

Load Aligner

Store Aligner

Logic Unit

High-Performance

Integer Multiply

System Control Coprocessor 50MFlops Single-Precision FPA

Address Translation/

Cache Attribute Control

Exception Management

Functions

FP Register File

Pack/Unpack

FP Add/Sub/Cvt/

Div/Sqrt

FP Multiply

Control Bus

Instruction Bus

Data Bus

Instruction Cache

Set A

(Lockable)

Instruction Cache

Set B

32-bit

Synchronized

System Interface

Data Cache

Set A

(Lockable)

Data Cache

Set B

The IDT logo is a registered trademark and ORION, R4650, R4640, RV4640, R4600, R3081, R3052, R3051, R3041, R5000, R36100 , RISController, and RISCore

are trademarks of Integrated Device Technology, Inc.

COMMERCIAL/INDUSTRIAL TEMPERATURE RANGE

© 1997 Integrated Device Technology, Inc.

MAY 1997

3486/1

1

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