MAX791C 查看數據表（PDF） - Maxim Integrated

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MAX791C

Microprocessor Supervisory Circuit

Maxim Integrated 

Microprocessor Supervisory Circuit

Pin Description

PIN NAME

1 VBATT

2

VOUT

3

VCC

4 GND

5 BATT ON

–——–

6 PFO

7

PFI

8 SWT

FUNCTION

Backup-Battery Input. Connect to external battery or capacitor and charging circuit.

Output Supply Voltage. VOUT connects to VCC when VCC is greater than VBATT and VCC is above the reset

threshold. When VCC falls below VBATT and VCC is below the reset threshold, VOUT connects to VBATT.

Connect a 0.1µF capacitor from VOUT to GND.

Input Supply Voltage—+5V input

Ground. 0V reference for all signals.

Battery-On Output. Goes high when VOUT switches to VBATT. Goes low when VOUT switches to VCC. Connect

the base of a PNP through a current-limiting resistor to BATT ON for VOUT current requirements greater than

250mA.

–——–

Power-Fail Output. This is the output of the power-fail comparator. PFO goes low when PFI is less than 1.25V.

This is an uncommitted comparator, and has no effect on any other internal circuitry.

P–—o—w–er-Fail Input. This is the noninverting input to the power-fail comparator. When PFI is less than 1.25V,

PFO goes low. Connect PFI to GND or VOUT when not used.

Set Watchdog-Timeout Input. Connect this input to VOUT to select the default 1.6s watchdog-timeout period.

Connect a capacitor between this input and GND to select another watchdog-timeout period. Watchdog-timeout

period = 2.1 x (capacitor value in nF) ms.

9

–M—R–

Manu–—a—l-—R—e–set Input.

put. RESET remains

This input can

low as long as

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or

to

a

logic

gate

out-

10

–——————–

LOWLINE

–——————–

LOWLINE Output goes low when VCC falls to 150mV above the reset threshold. The output can be used to gen-

erate an NMI if the unregulated supply is inaccessible.

11 WDI

12 C–—E– OUT

13 –C—E– IN

–——–

14 WDO

–————–

15 RESET

–———–

16 WDPO

Watchdog I–n—p—ut–. WDI is a th–r—e—e-–level input. If WDI remains either high or low for longer than the watchdog time-

out period, WDO goes low. WDO remains low until the next transition at WDI. Leaving WDI unconnected disables

the watchdog function. WDI connects to an internal voltage-divider between VOUT and GND, which sets it to mid-

supply when left unconnected.

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Chip-Enable Input. The input to chip-enable gating circuit. Connect to GND or VOUT if not used.

–——–

–W—a—tc–hdog Output. WDO goes low if WDI remain–s—e—ith–er high or low longer than the watchdo–—g—-ti–meout period.

WDO r–—e—tu—r—n–s high on the next transition at WDI. WDO remains high if WDI is unconnected. WDO is also high

when RESET is asserted.

–————–

–————–

RESET Output goes low whenever VCC falls below the reset threshold. RESET will remain low for typically 200ms

after VCC crosses the reset threshold on power-up.

–———–

W–—a—tc—h–dog-Pulse O–—ut—p–ut. Upon the absence of a transition at WDI, WDPO will pulse low for a minimum of 1ms.

WDPO precedes WDO by 70ns.

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