LTC1595CCS8 查看數據表（PDF） - Linear Technology

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LTC1595CCS8

Serial 16-Bit Multiplying DACs

Linear Technology 

LTC1595/LTC1596/LTC1596-1

TRUTH TABLES

Table 1. LTC1596/LTC1596-1 Input Register

CONTROL INPUTS

STB1 STB2 STB3 STB4 INPUT REGISTER AND SRO OPERATION

0 1 0 Serial Data Bit on SRI Loaded Into Input

0

1 0 Register, MSB First

Data Bit or SRI Appears on SRO Pin After

00

0 16 Clocked Bits

001

1 X X X No Input Register Operation

X 1 X X No SRO Operation

XX0X

XXX 1

Table 2. LTC1596/LTC1596-1 DAC Register

CONTROL INPUTS

CLR LD1 LD2 DAC Register Operation

0

X

X Reset DAC Register and Input Register to

All 0s (LTC1596) or to Mid-Scale (LTC1596-1)

(Asynchronous Operation)

1

1

X No DAC Register Operation

1

X

1

1

0

0 Load DAC Register with the Contents of Input

Register

BLOCK DIAGRAM (LTC1595)

VREF 1

56k

56k

56k

56k

56k

56k

56k

56k

56k

112k

112k

112k 112k 7k

2 RFB

VDD 8

LD 5

CLK 7

DECODER

D15

D14

(MSB)

LOAD

D13

D12

DAC REGISTER

D11 • • •

D0

(LSB)

CLK

INPUT 16-BIT SHIFT REGISTER

IN

3 OUT1

4 GND

6 SRI

1595 BD

TIMING DIAGRAM (LTC1595)

tDS

tDH

CLK INPUT

PREVIOUS

D15

SRI

WORD

MSB

D14

LD

tCL

tCH

tSRI

D1

8

For more information www.linear.com/LTC1595

D0

LSB

tASB

tLD

1595 TD

159561fc

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