M41T256YMT7 查看數據表（PDF） - STMicroelectronics

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M41T256YMT7

256 Kbit (32K x8) Serial RTC

STMicroelectronics 

Figure 7. Serial Bus Data Transfer Sequence

DATA LINE

STABLE

DATA VALID

(SCL) CLOCK

M41T256Y

(SDA) DATA

START

CONDITION

CHANGE OF

DATA ALLOWED

Figure 8. Acknowledgement Sequence

START

SCL FROM

MASTER

1

2

DATA OUTPUT

BY TRANSMITTER

MSB

DATA OUTPUT

BY RECEIVER

STOP

CONDITION

AI04756

CLOCK PULSE FOR

ACKNOWLEDGEMENT

8

9

LSB

AI00601

7/27

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