ADSP-BF523KBCZ-6C2 查看數據表（PDF） - Analog Devices

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ADSP-BF523KBCZ-6C2

Blackfin Embedded Processor with Codec

Analog Devices 

ADSP-BF522C/ADSP-BF523C/ADSP-BF524C/ADSP-BF525C/ADSP-BF526C/ADSP-BF527C

Table 11. Register 7 Digital Audio I/F

Bit Name

BCLKINV

Bits Description

B7 CODEC_BCLK inversion control

MS

B6 Master mode enable

LRSWAP

B5 Swap DAC data control

LRP

B4 Polarity control for clocks in right-justified,

left-justified, and I2S modes

WL [1:0]

B[3:2] Data-word length control

FORMAT [1:0] B[1:0] Digital audio input format control

Table 12. Register 8 Sampling Rate

Settings

0 = CODEC_BCLK not inverted (default)

1 = CODEC_BCLK inverted

0 = enable slave mode (default)

1 = enable master mode

0 = output left- and right-channel data as normal (default)

1 = swap left- and right-channel DAC data in audio interface

0 = normal DACLRC and ADCLRC (default),

or processor Submode 1

1 = invert DACLRC and ADCLRC polarity, or processor Submode 2

00 = 16 bits

01 = 20 bits

10 = 24 bits (default)

11 = 32 bits

00 = right justified

01 = left justified

10 = I2S mode (default)

11 = processor mode

Bit Name

CLKODIV2

CLKDIV2

SR [3:0]

BOSR

Bits

Description

B7

CODEC_CLKOUT divider select

B6

Codec clock divide select

B[5:2]

B1

Clock setting condition

Base oversampling rate

USB

B0

USB mode select

Table 13. Register 9 Active

Settings

0 = CODEC_CLKOUT is codec clock (default)

1 = CODEC_CLKOUT is codec clock divided by 2

0 = codec clock is CODEC_MCLK (default)

1= codec clock is CODEC_MCLK divided by 2

See Table 1 on Page 9 and Table 2 on Page 10

USB mode:

0 = support for 250 × fS based clock (default)

1 = support for 272 × fS based clock

Normal mode:

0 = support for 256 × fS based clock (default)

1 = support for 384 × fS based clock

0 = normal mode enable (default)

1 = USB mode enable

Bit Name

ACTIVE

Bit Description

B0 Digital core activation control

Table 14. Register 10 Software Reset

Settings

0 = disable digital core (default)

1 = activate digital core

Bit Name Bit Description

RESET [8:0] B[8:0] Write all 0s to this register to set all registers to their default settings.

Other data written to this register has no effect.

Settings

0 = reset (default)

Rev. A | Page 20 of 36 | March 2010

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