LTC6903 查看數據表（PDF） - Linear Technology
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LTC6903 Datasheet PDF : 14 Pages
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LTC6903/LTC6904
APPLICATIONS INFORMATION
Power-Up State
When power is first applied to the LTC6903/LTC6904,
all register values are automatically reset to 0. This results
in an output frequency of 1.039kHz with both outputs active.
Output Spectrum
In most frequency ranges, the output of the LTC6903/
LTC6904 is generated as a division of the higher internal
clock frequency. This helps to minimize jitter and sub-
harmonics at the output of the device. In the highest
frequency ranges, the division ratio is reduced, which
will result in greater cycle-to-cycle jitter as well as spurs
at the internal sampling frequency. Because the internal
control loop runs at 1MHz to 2MHz without regard to the
output frequency, output spurs separated from the set
frequency by 1MHz to 2MHz may be observed. These
spurs are characteristically more than 30dB below the
level of the set frequency.
Frequency Settling
When frequency settings change, the settling time and
shape differ depending on which bits are changed. Changing
only the OCT bits will result in an instantaneous change
in frequency for OCT values below 10. Values of 10 and
above may take up to 100µs to settle due to the action of
internal power conservation circuitry.
Changing the DAC bits will result in a smooth transition
between the frequencies, occupying at most 100µs, with
little overshoot.
Changing both the OCT and DAC bits simultaneously may
result in considerable excursion beyond the frequencies
requested before settling.
It should be noted that changing the DAC bits at the lower
frequency ranges will result in a seemingly instantaneous
frequency change because the settling time depends on
the internal loop frequency rather than the set frequency.
Power Supply Bypass
In order to obtain the accuracies represented in this data
sheet, it is necessary to provide excellent bypass on the
power supply. Adequate bypass is a 1µF capacitor in
parallel with a 0.01µF capacitor connected within a few
millimeters of the power supply leads.
Monotonicity and Linearity
The DAC in the LTC6903/LTC6904 is guaranteed to be
10-bit monotonic. Nonlinearity of the DAC is less than 1%.
Additionally, the LTC6903/LTC6904 is guaranteed to be
monotonic when switching between octaves with the
OCT setting bits. For example, the frequency output with
a DAC setting of “1111111111” and an OCT setting of
“1100” will always be lower than the frequency output
with a DAC setting of “0000000000” and an OCT setting
of “1101”. Linearity at these transition points is typically
around 3 LSBs.
Output Loading and Accuracy
Improper loading of the outputs of the LTC6903/LTC6904,
especially with poor power supply bypassing, will result in
accuracy problems. At low frequencies, capacitive loading
of the output is not a concern. At frequencies above 1MHz,
attention should be paid to minimize the capacitive load
on the CLK and CLK pins.
The LTC6903/LTC6904 is designed to drive up to 5pF
on each output with no degradation in accuracy. 5pF is
equivalent to one to two HC series logic inputs. A standard
10x oscilloscope probe usually presents between 10pF
and 15pF of capacitive load.
It is strongly suggested that a high speed buffer is used
when driving more than one or two logic inputs, when
driving a line more than 5 centimeters in length, or a
capacitive load greater than 5pF.
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