FAN7171-F085 查看數據表（PDF） - ON Semiconductor
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FAN7171-F085 Datasheet PDF : 11 Pages
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FAN7171−F085
Table 1. PIN DESCRIPTIONS
Pin #
1
2
3
4
5
6
7
8
Name
VDD
IN
NC
GND
NC
VS
HO
VB
Description
Supply Voltage
Logic Input for High−Side Gate Driver Output
No Connection
Ground
No Connection
High−Voltage Floating Supply Return
High−Side Driver Output
High−Side Floating Supply
Table 2. ABSOLUTE MAXIMUM RATINGS
Symbol
Characteristics
Min.
Max.
Unit
VS
VB
VHO
VDD
VIN
dVS/dt
PD
θJA
TJ
TSTG
TA
ESD
High−Side Floating Offset Voltage
High−Side Floating Supply Voltage (Note 3)
High−Side Floating Output Voltage
Low−Side and Logic Supply Voltage (Note 3)
Logic Input Voltage
Allowable Offset Voltage Slew Rate
Power Dissipation (Notes 4, 5, 6)
Thermal Resistance
Junction Temperature
Storage Temperature
Operating Ambient Temperature
Human Body Model (HBM)
Charge Device Model (CDM)
VB−VSHUNT
−0.3
VS−0.3
−0.3
−0.3
−55
−55
−40
VB+0.3
625.0
VB+0.3
VSHUNT
VDD+0.3
±50
0.625
200
150
150
125
1500
500
V
V
V
V
V
V/ns
W
°C/W
°C
°C
°C
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
3. This IC contains a shunt regulator on VDD and VBS with a normal breakdown voltage of 25 V. Please note that this supply pin should not be
driven by a low−impedance voltage source greater than the VSHUNT specified in the Electrical Characteristics section.
4. Mounted on 76.2 x 114.3 x 1.6 mm PCB (FR−4 glass epoxy material).
5. Refer to the following standards:
JESD51−2: Integral circuits thermal test method environmental conditions, natural convection, and
JESD51−3: Low effective thermal conductivity test board for leaded surface−mount packages.
6. Do not exceed power dissipation (PD) under any circumstances.
Table 3. RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min.
Max.
Unit
VBS
High−Side Floating Supply Voltage
VS+10
VS+20
V
High−Side Floating Supply Offset Voltage (DC)
6−VDD
VS
−15 (~170)
600
V
High−Side Floating Supply Offset Voltage (Transient)
−7 (~400)
VHO
High−Side Output Voltage
VS
VB
V
VIN
Logic Input Voltage
GND
VDD
V
VDD
Supply Voltage
10
20
V
TPULSE
Minimum Input Pulse Width (Note 7)
80
−
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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