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AT91RM9200(2003) 查看數據表(PDF) - Atmel Corporation

零件编号
产品描述 (功能)
生产厂家
AT91RM9200
(Rev.:2003)
Atmel
Atmel Corporation Atmel
AT91RM9200 Datasheet PDF : 650 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
– Abort generation in case of misalignment
• Remap command
– Provides remapping of an internal SRAM in place of the boot NVM
External Bus
Interface
• Integrates three External Memory Controllers:
– Static Memory Controller
– SDRAM Controller
– Burst Flash Controller
• Additional logic for SmartMediaTM and CompactFlashTM support
• Optimized External Bus:
– 16- or 32-bit Data Bus
– Up to 26-bit Address Bus, up to 64-Mbytes addressable
– Up to 8 Chip Selects, each reserved to one of the eight Memory Areas
– Optimized pin multiplexing to reduce latencies on External Memories
• Configurable Chip Select Assignment:
– Burst Flash Controller or Static Memory Controller on NCS0
– SDRAM Controller or Static Memory Controller on NCS1
– Static Memory Controller on NCS3, Optional SmartMedia Support
– Static Memory Controller on NCS4 - NCS6, Optional CompactFlash Support
– Static Memory Controller on NCS7
Static Memory
Controller
• External memory mapping, 512-Mbyte address space
• Up to 8 Chip Select Lines
• 8- or 16-bit Data Bus
• Remap of Boot Memory
• Multiple Access Modes supported
– Byte Write or Byte Select Lines
– Two different Read Protocols for each Memory Bank
• Multiple device adaptability
– Compliant with LCD Module
– Programmable Setup Time Read/Write
– Programmable Hold Time Read/Write
• Multiple Wait State Management
– Programmable Wait State Generation
– External Wait Request
– Programmable Data Float Time
SDRAM Controller
• Numerous configurations supported
– 2K, 4K, 8K Row Address Memory Parts
– SDRAM with two or four Internal Banks
– SDRAM with 16- or 32-bit Data Path
• Programming facilities
– Word, half-word, byte access
– Automatic page break when Memory Boundary has been reached
6 AT91RM9200
1768B–ATARM–08/03

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