1EDF5673KXUMA1 查看數據表（PDF） - Infineon Technologies
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1EDF5673KXUMA1 Datasheet PDF : 39 Pages
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GaN EiceDRIVER™ product family
GaN gate driver
Functional description
3
Functional description
3.1
Block diagram
A simplified functional block diagram of the GaN EiceDRIVER™ is given in Figure 6. The 4 output transistors are
placed on 2 separate dies. Isolation between input and outputs is achieved by means of two coreless transformer
structures (CT) situated on the input die.
VDDI
SLDO
PWM
UVLOin
SLDO
Ishunt
TX
GNDI
Control Logic
DISABLE
TX
TNEG
GNDI
Delay t1
GNDI
UVLOoutS
VDDS
RX
Control
Logic
S1
OUTS
S2
GNDS
UVLOoutG
VDDG
RX
Control
Logic
S3
OUTG
S4
GNDG
Figure 6 Block diagram
3.2
Isolation
The GaN EiceDRIVER™ is available in three package versions in accordance with different classes of input-to-
output isolation voltage requirements
• 1EDF5673K in LGA-13 5 x 5 mm package for functional isolation (1.5 kV)
• 1EDF5673F in DSO-16 narrow-body (150 mil) package for functional isolation (1.5 kV)
• 1EDS5663H in DSO-16 wide-body (300 mil) package for reinforced isolation
In SMPS functional isolation is typical for high-voltage systems that are controlled from their primary side,
whereas high-voltage switches controlled from the secondary side require safe isolation.
The safe isolation version 1EDS5663H is tested according to VDE0884-10 standards as specified in Table 15 to
Table 18. As the CT forming this barrier is placed on the input die, a true "fail-safe" isolation is achieved, i.e. even
in case of a destruction of the power switch the driver input remains safely isolated from the output.
Final datasheet
9
Rev. 2.3
2020-10-22
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