98ASB42844B 查看數據表（PDF） - NXP Semiconductors.

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98ASB42844B

8-Bit S08 central processor unit (CPU)

NXP Semiconductors. 

MCU block diagram

HCS08 CORE

CPU

BDC

SYSTEM INTEGRATION

MODULE (SIM)

WDOG

IRQ

1 kHz OSC

LVD

INTERRUPT PRIORITY

CONTROLLER(IPC)

ON-CHIP ICE AND

DEBUG MODUE (DBG)

USER FLASH

MC9S08PA60 = 60,864 bytes

MC9S08PA32 = 32,768 bytes

USER EEPROM

MC9S08PA60 = 256 bytes

MC9S08PA32 = 256 bytes

USER RAM

MC9S08PA60 = 4,096 bytes

MC9S08PA32 = 4,096 bytes

EXTAL

XTAL

VDD

VSS

VDD

VSS

5

5

VSS 5

VREFH

VVVRDSSDEAFAL

20 MHz INTERNAL CLOCK

SOURCE (ICS)

EXTERNAL OSCILLATOR

SOURCE (XOSC)

POWER MANAGEMENT

CONTROLLER (PMC)

16-CH 12-BIT

ANALOG-TO-DIGITAL

CONVERTER(ADC)

KEYBOARD INTERRUPT

MODULE (KBI0)

KBYBOARD INTERRUPT

MODULE (KBI1)

8-BIT MODULO TIMER

(MTIM0)

8-BIT MODULO TIMER

(MTIM1)

2-CH FLEX TIMER

MODULE (FTM0)

2-CH FLEX TIMER

MODULE (FTM1)

6-CH FTM TIMER

MODULE (FTM2)

SERIAL COMMUNICATION

INTERFACE (SCI0)

SERIAL COMMUNICATION

INTERFACE (SCI1)

SERIAL COMMUNICATION

INTERFACE (SCI2)

8-BIT SERIAL PERIPHERAL

INTERFACE MODULE(SPI0)

16-BIT SERIAL PERIPHERAL

INTERFACE MODULE(SPI1)

INTER-INTEGRATED

CIRCUIT(IIC)

ANALOG COMPARATOR

(ACMP)

REAL-TIME COUNTER

(RTC)

PTA0/KBI0P0/FTM0CH0/ACMP0/ADP0

PTA1/KBI0P1/FTM0CH1/ACMP1/ADP1

PTA2/KBI0P2/RxD0/SDA 1

PTA3/KBI0P3/TxD0/SCL 1

PTA4/ACMPO/BKGD/MS 2

PTA5/IRQ/TCLK0/RESET

PTA6/FTM2FAULT1/ADP2

PTA7/FTM2FAULT2/ADP3

PTB0/KBI0P4/RxD0/ADP4

PTB1/KBI0P5/TxD0/ADP5

PTB2/KBI0P6/SPSCK0/ADP6

PTB3/KBI0P7/MOSI0/ADP7

PPTTBB45//FFTTMM22CCHH45//MSSIS0O30 3

PTB6/SDA/XTAL

PTB7/SCL/EXTAL

PTC0/FTM2CH0/ADP8

PTC1/FTM2CH1/ADP9/

PTC2/FTM2CH2/ADP10

PTC3/FTM2CH3/ADP11

PTC4/FTM1CH0/RTCO

PTC5/FTM1CH1

PTC6/RxD1

PTC7/TxD1

PTD0/KBI1P0/FTM2CH2/SPSCK13

PTD1/KBI1P1/FTM2CH3/MOSI13

PTD2/KBI1P2/MISO1

PTD3/KBI1P3/SS1

PTD4/KBI1P4

PTD5/KBI1P5

PTD6/KBI1P6/RxD2

PTD7/KBI1P7/TxD2

PTE0/SPSCK0/TCLK1 3

PTE1/MOSI03

PTE2/MISO0

PTE3/SS0

PTE4

PTE5

PTE6

PTE7/TCLK2

PTF0

PTF1

PTF2

PTF3

PTF4/ADP12

PTF5/ADP13

PTF6/ADP14

PTF7/ADP15

PTG0

PTG1

PTG2

PTG3

CYCLIC REDUNDANCY

CHECK (CRC)

PTH0/FTM2CH0 3

PTH1/FTM2CH1 3

PTH2/BUSOUT 4

PTH6

PTH7

1. PTA2 and PTA3 operate as true open drain when working as output .

2. PTA4/ACMPO/BKGD/MS is an output-only pin when used as port pin.

3. PTB4, PTB5, PTD0, PTD1, PTE0, PTE1, PTH0 and PTH1 can provide high sink/source current drive.

4. The frequency of the clock from BUSOUT must be equal or less than 10 MHz with 25 pF loading at PAD.

5. The secondary power pair of VDD and VSS (pin 41 and pin 40 in 64-pin packages) and the third VSS (pin 13 in 64-pin packages) are not bonded

in 32-pin packages.

Figure 1. MCU block diagram

MC9S08PA60 Series Data Sheet, Rev. 4, 09/2019

NXP Semiconductors

5

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