M41T62LC6F(2019) 查看數據表（PDF） - STMicroelectronics

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M41T62LC6F
(Rev.:2019)

Low-power serial real-time clocks (RTCs) with alarm

STMicroelectronics 

M41T62, M41T64, M41T65

WRITE mode

2.3

WRITE mode

In this mode the master transmitter transmits to the M41T6x slave receiver. Bus protocol is shown in

Figure 16. WRITE mode sequence. Following the START condition and slave address, a logic '0' (R/W̅ =0) is

placed on the bus and indicates to the addressed device that word address “An” will follow and is to be written to

the on-chip address pointer. The data word to be written to the memory is strobed in next and the internal address

pointer is incremented to the next address location on the reception of an acknowledge clock. The M41T6x slave

receiver will send an acknowledge clock to the master transmitter after it has received the slave address see

Figure 13. Slave address location and again after it has received the word address and each data byte.

Figure 16. WRITE mode sequence

BUS ACTIVITY:

MASTER

SDA LINE

S

WORD

ADDRESS (An)

BUS ACTIVITY:

SLAVE

ADDRESS

DATA n

DATA n+1

DATA n+X P

DS3840 - Rev 24

page 10/42

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