BR24T1MFJ-3AM 查看數據表（PDF） - ROHM Semiconductor
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BR24T1MFJ-3AM Datasheet PDF : 32 Pages
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BR24T1M-3AM
Datasheet
Write Command
1. Write Cycle
(1) Arbitrary data can be written to EEPROM. When writing only 1 byte, Byte Write is normally used, and when
writing continuous data of 2 bytes or more, simultaneous write is possible by Page Write cycle. The maximum
number of write bytes is specified per device of each capacity.
Up to 256 arbitrary bytes can be written.（In the case of BR24T1M-3AM）
SDA
LINE
S
W
T
R
A
I
R
SLAVE T
1st WORD
T
ADDRESS E
ADDRESS
1 0 1 0 A2 A1 P0
WAWA
15 14
RA
/C
WK
2nd WORD
ADDRESS
S
T
DATA
O
P
WA D7
D0
0
A
A
A
C
C
C
K
K
K
Figure 36. Byte Write Cycle
SDA
LINE
S
W
T
R
A
I
R
SLAVE
T
T
ADDRESS
E
1st WORD
ADDRESS(n)
1 0 1 0 A2 A1 P0
WA WA
15 14
RA
/C
WK
2nd WORD
ADDRESS(n)
DATA(n)
WA
D7
D0
0
A
A
A
C
C
C
K
K
K
Figure 37. Page Write Cycle
S
T
O
DATA(n+255)
P
D0
A
C
K
(2) During internal write execution, all input commands are ignored, therefore ACK is not returned.
(3) Data is written to the address designated by word address (n-th address)
(4) By issuing stop bit after 8bit data input, internal write to memory cell starts.
(5) When internal write is started, command is not accepted for tWR (5ms at maximum).
(6) Using page write cycle, writing in bulk is done as follows: Up to 256Byte (BR24T1M-3AM）
The bytes in excess overwrite the data already sent first.
(Refer to "Internal Address Increment")
(7) As for page write cycle of BR24T1M-3AM, where 2 or more bytes of data is intended to be written, after the page
select bit ‘P0’ of slave, and the 8 significant bits of word address are designated arbitrarily, only the value of 8
least significant bits in the address is incremented internally, so that data up to 256 bytes of memory only can be
written.
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TSZ02201-0GFG0G100430-1-2
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