A8837 查看數據表（PDF） - Allegro MicroSystems

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A8837

Photoflash Capacitor Charger with IGBT Driver

Allegro MicroSystems 

A8837

Photoflash Capacitor Charger with IGBT Driver

Functional Description

Overview

The A8837 is a photoflash capacitor charger control IC with

adjustable input current limiting. It also integrates an IGBT

driver for strobe operation of the flash tube, dramatically saving

board space in comparison to discrete solutions for strobe flash

operation. The control logic is shown in the functional block

diagram.

The charging operation of the A8837 is started by a low-to-high

signal on the CHARGE pin, provided that VIN is above VUVLO

level. If CHARGE is already high before VIN reaches VUVLO ,

another low-to-high transition on the CHARGE pin is required

to start the charging. The primary peak current is set by input

clock signals from the CHARGE pin. When a charging cycle is

initiated, the transformer primary side current, IPrimary, ramps up

linearly at a rate determined by the combined effect of the battery

voltage, VBATT , and the primary side inductance, LPrimary. When

IPrimary reaches the current limit, ISWLIM , the internal MOSFET

is turned off immediately, allowing the energy to be pushed into

the photoflash capacitor, COUT, from the secondary winding.

The secondary side current drops linearly as COUT charges. The

switching cycle starts again, either after the transformer flux is

reset, or after a predetermined time period, tOFF(Max) (18 μs),

whichever occurs first.

The output voltage, VOUT, is sensed by a resistor string, R1, R2 ,

and R3 (see application circuit diagrams), connected across the

transformer secondary winding. This resistor string forms a volt-

age divider that feeds back to the FB pin. The resistors must be

sized to achieve a desired output voltage level based on a typical

value of 1.205 V at the FB pin. As soon as VOUT reaches the

desired value, the charging process is terminated. Toggling the

CHARGE pin can start a refresh operation.

Input Current Limiting

The peak current limit can be adjusted to eight different levels,

from 700 mA to 2.0 A, by clocking the CHARGE pin. An inter-

nal digital circuit decodes the input clock signals to a counter,

which sets the charging time. This flexible scheme allows the

user to operate the flash circuit according to different battery

input voltages. The battery life can be effectively extended by

setting a lower current limit at low battery voltages.

Figure 4 shows the ILIM clock timing scheme protocol. The

total ILIM setup time, tILIM(SU) , denotes the time needed for the

decoder circuit to receive ILIM inputs and set ISWLIM . Apply cur-

rent limit pulses during tILIM(SU) (54 μs) period.

Figure 5 shows the timing definition of the primary current

limiting circuit. At the end of the setup period, tILIM(SU) , primary

Clock input at

CHARGE pin

t ILIM(L) ≥ 0.2 μs

t ILIM1(H) = min.

first pulse width

t ILIM(H) ≥ 0.2 μs

t ILIM(SU) =

ILIM setup time

First rising

edge

Subsequent rising

edges (0 to 7)

Switching

starts

0 μs

20 μs

54 μs

Figure 4. ILIM Clock Timing Definition

Start ILIM counter

Reset ILIM counter

CHARGE

Four rising edges

within tILIM(SU)

ISWLIM4 = 1.4 A

ISW

0 μs 20 μs

Switching

starts

54 μs

Switching

stops

Figure 5. Current Limit Programming Example (ISWLIM4 selected).

Allegro MicroSystems, Inc.

7

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

www.allegromicro.com

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