DS3514TR 查看數據表（PDF） - Maxim Integrated
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DS3514TR Datasheet PDF : 21 Pages
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I2C Gamma and VCOM Buffer with EEPROM
Block Diagram
DS3514
I2C
COMP
BANKS
GM14 BANK A
GM14 BANK B
GM14 BANK C
GM14 BANK D
S0/S1 PINS
S0/S1 BITS
MUX
0
1
LATCH A
0
10 BITS
LATCH B
1
LD
MODE0 BIT
MODE1 BIT
GHH
10-BIT
DAC
GHM
GHH
GHH
GM14
BANKS
GM8 BANK A
GM8 BANK B
GM8 BANK C
GM8 BANK D
S0/S1 PINS
S0/S1 BITS
MUX
0
1
LATCH A
0
10 BITS
LATCH B
1
LD
SDA
SCL
I2C
I2C
I2C
COMP
A0
INTERFACE
MODE0 BIT
MODE1 BIT
BANKS
VCOM BANK A
MODE0 BIT (CR.0)
VCOM BANK B
VCOM BANK C
VCOM BANK D
MUX
S0
LOGIC
MODE1 BIT (CR.1)
S1
LD
AND
CONTROL
S0/S1 PINS
S0/S1 PINS
0
S0/S1 BITS (SOFT S0/S1)
0
8 BITS
LATCH B
1
LD
S0/S1 BITS
1
LATCH A
LD
I2C
COMP
MODE0 BIT
MODE1 BIT
VCAP
COMPENSATION
COMP
VDD
VDD
VCC
VCC
GND
I2C
COMP
I2C
COMP
BANKS
GM7 BANK A
GM7 BANK B
GM7 BANK C
GM7 BANK D
S0/S1 PINS
S0/S1 BITS
MUX
0
1
LATCH A
0
10 BITS
LATCH B
1
LD
MODE0 BIT
MODE1 BIT
BANKS
GM1 BANK A
GM1 BANK B
GM1 BANK C
GM1 BANK D
S0/S1 PINS
S0/S1 BITS
MUX
0
1
LATCH A
0
10 BITS
LATCH B
1
LD
MODE0 BIT
MODE1 BIT
GHH
10-BIT
DAC
GHM
8-BIT
DAC
GLM
10-BIT
DAC
GLL
GLM
10-BIT
DAC
GLL
GM8
GHM
GHM
VRH
VCOM
VRL
GLM
GLM
GM7
GM1
GLL
GLL
10 ______________________________________________________________________________________
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