I2C Gamma and VCOM Buffer with EEPROM
S0/S1
tHD
LD
VIL
VIH
VIL
tSU
VIH
tSET-G
GM1–G14
Figure 2. GM1–GM14 Settling Timing Diagram
GM1–GM14
ILOAD
4tAU SETTLED
100pF
S0/S1
(LD = VCC)
GM1–GM14
VIH
VIL
tSEL
OUTPUT 10% SETTLED
Figure 3. Input Pin to Output Change Timing Diagram
GM1–GM14
100pF
SDA
tBUF
tLOW
SCL
tHD:STA
tR
STOP
START
NOTE: TIMING IS REFERENCED TO VIL(MAX) AND VIH(MIN).
Figure 4. I2C Timing Diagram
tHD:DAT
tF
tHIGH
tSU:DAT
tHD:STA
tSU:STA
REPEATED
START
tSP
tSU:STO
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